Estimation of non-functional Properties
The estimation of non-functional properties like time and energy for running a software on embedding computer architectures is an important research area. There exists much prior work in this regard with different concepts to achieve a fast but accurate estimation using processor simulators or similar models. A well-known method is the usage of mechanistic models as defined by Lieven Eeckhout. Processor simulators based on this model use internal knowledge about the simulated architecture to predict the nonfunctional properties. At the chair, such models on different abstraction levels are currently available. Generally, the more accurate and detailed a model is written, the more exact are the estimation of non-functional properties on the one hand, but also the more time it takes to get them. Therefore, additionally to these mechanistic models, statistical models are also of interest for estimating the nonfunctional properties, to save prediction time.
While the presented research results are available to estimate of non-functional properties of existing computer architectures like ARM or RISC-V, this method can be also used for design space exploration of new architectures. Such new architectures could include ternary processor data paths within a processor which might improve the speed of the CPU in certain circumstances when logical operations are not very common. Moreover, the usage of non-volatile memory architectures and register files can be realized to create a non-volatile processor suitable for applications with sporadic energy outages. While the discussed architectural features were researched in detail (on circuit level) at the chair of computer architecture before, the behavior on system level is still missing.
Therefore, the overall research goal in this project is to create a combined toolkit, meaning a system simulator/emulator for estimation of non-functional properties, but with focus on the evaluation of novel architectural features.