Steffen Vaas

Steffen Vaas, M. Sc.

Department Informatik (INF)
Lehrstuhl für Informatik 3 (Rechnerarchitektur)

Information

2008-2011: Bachelor’s Degree (B.Eng.)

in Electrical Engineering (Nachrichten- und Kommunikationstechnik) at the DHBW Ravensburg

2011-2012: Worked as a development engineer for digital circuit- and FPGA designs at Airbus

2012-2015: Master’s Degree (M.Sc.) in Information and Communication Technology (IuK)

at the Friedrich-Alexander-Universität Erlangen-Nürnberg

2015-now: Research Fellow at the Chair of Computer Architecture

 

Research Interests

  • Deterministic Multi-Core Architectures for Safety-Critical Applications
  • Soft-Core Processors on FPGAs
  • Application-Specific Instruction-Set Processors (ASIP)

 

Publications

2021

2019

2018

2017

2016

2015