Prof. Dr.-Ing. Dietmar Fey

2024

• Baumeister T., Hofmann S., Kob T., Fey D.:
  Exploring Interactive Online Script Creation as a Novel Assessment Method in Higher Education
  Education and New Developments 2024 (Porto, 15. Juni 2024 - 17. Juni 2024)
  DOI: 10.36315/2024v1end050
• Baumeister T., Schmutterer F., Fey D.:
  From Myths to Methods: Teaching Cryptography with the Enigma Machine
  7th International Conference on Historical Cryptology (HistoCrypt 2024) (Oxford, 25. Juni 2024 - 27. Juni 2024)
  DOI: 10.58009/aere-perennius0084
• Ebrahimiazandaryani F., Fey D.:
  ExTern: Boosting RISC-V core performance using ternary encoding
  In: Microprocessors and Microsystems 107 (2024), Art.Nr.: 105058
  ISSN: 0141-9331
  DOI: 10.1016/j.micpro.2024.105058
• Fritscher M., Singh S., Rizzi T., Baroni A., Reiser D., Mallah M., Hartmann D., Bende A., Kempen T., Uhlmann M., Kahmen G., Fey D., Rana V., Menzel S., Reichenbach M., Krstic M., Merchant F., Wenger C.:
  A flexible and fast digital twin for RRAM systems applied for training resilient neural networks
  In: Scientific Reports 14 (2024), S. 23695-
  ISSN: 2045-2322
  DOI: 10.1038/s41598-024-73439-z
  (Techreport)
• Fritscher M., Uhlmann M., Ostrovskyy P., Reiser D., Chen J., Schubert A., Schulze C., Kahmen G., Fey D., Reichenbach M., Krstic M., Wenger C.:
  Area-Efficient Digital Design Using RRAM-CMOS Standard Cells
  2024 IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2024 (Knoxville, TN, 1. Juli 2024 - 3. Juli 2024)
  In: Himanshu Thapliyal, Jurgen Becker (Hrsg.): 2024 IEEE Computer Society Annual Symposium on VLSI (ISVLSI) 2024
  DOI: 10.1109/ISVLSI61997.2024.00026
• Lex J., Margull U., Mader R., Fey D.:
  HyFAR: A hypervisor-based fault tolerance approach for heterogeneous automotive real-time systems
  In: Journal of Systems Architecture 156 (2024), Art.Nr.: 103263
  ISSN: 1383-7621
  DOI: 10.1016/j.sysarc.2024.103263
• Pfenning S., Simpetru R., Pollak N., Del Vecchio A., Fey D.:
  ANALYSIS OF EMBEDDED GPU ARCHITECTURES FOR AI IN NEUROMUSCULAR APPLICATIONS
  In: IADIS International Journal on Computer Science and Information Systems 19 (2024), S. 1-14
  ISSN: 1646-3692
  DOI: 10.33965/ijcsis_2024190101
  URL: http://www.iadisportal.org/ijcsis/papers/2024190101.pdf

2023

• Baumeister T., Rambach P., Fey D.:
  The Benefits of Continuous Assessment: A Case Study on the Effectiveness of Weekly Online Quizzes in Computer Science Courses
  16th International Conference of Education, Research and Innovation (Sevilla, 13. November 2023 - 15. November 2023)
  DOI: 10.21125/iceri.2023.1161
  URL: https://library.iated.org/view/BAUMEISTER2023BEN
• Fey D.:
  Memristive computing in Germany
  In: it - Information Technology (2023)
  ISSN: 1611-2776
  DOI: 10.1515/itit-2023-0017
• Gündogan K., Gündisch P., Fey D.:
  Heterogeneous Framework Architecture of Specialized Accelerators for Vehicle Sensors
  In: AmE 2023 – Automotive meets Electronics; 14. GMM Symposium 2023
  URL: https://ieeexplore.ieee.org/abstract/document/10227705
• Hoffmann M., Noegel T., Schüßler C., Schwenger L., Gulden P., Fey D., Vossiek M.:
  Implementation of Real-Time Automotive SAR Imaging
  2023 20th European Radar Conference (Berlin, 20. September 2023 - 22. September 2023)
  DOI: 10.23919/EuRAD58043.2023.10289475
• Hosseinzadeh Foroushani S., Klemm M., Fischer G., Fey D.:
  Optimizing multi-level ReRAM memory for low latency and low energy consumption
  In: it - Information Technology (2023)
  ISSN: 1611-2776
  DOI: 10.1515/itit-2023-0022
• Hosseinzadeh S., Parvaresh A., Fey D.:
  Optimization of OLAP In-Memory Database Management Systems with Processing-In-Memory Architecture
  36th International Conference on Architecture of Computing Systems, ARCS 2023 (Athens, GRC, 13. Juni 2023 - 15. Juni 2023)
  In: Georgios Goumas, Sven Tomforde, Jürgen Brehm, Stefan Wildermann, Thilo Pionteck (Hrsg.): Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics) 2023
  DOI: 10.1007/978-3-031-42785-5_18
• Kliemt J., Fey D.:
  Work in Progress: Extending Virtual Prototypes of Microprocessor Architectures with Accuracy Tracing
  13th International Conference on Simulation and Modeling Methodologies, Technologies and Applications (Rome, 12. Juli 2023 - 14. Juli 2023)
  In: Proceedings of the 13th International Conference on Simulation and Modeling Methodologies, Technologies and Applications - SIMULTECH 2023
  DOI: 10.5220/0012131800003546
• Lex J., Margull U., Fey D., Mader R.:
  Evaluation of different hypervisor technologies for real-time sensitive backup strategies in heterogeneous systems
  14th GMM Symposium on Automotive meets Electronics, AmE 2023 (Dortmund, 15. Juni 2023 - 16. Juni 2023)
  In: GMM-Fachberichte 2023
• Parvaresh A., Hosseinzadeh S., Fey D.:
  Resilience and Precision Assessment of Natural Language Processing Algorithms in Analog In-Memory Computing: A Hardware-Aware Study
  18th ACM International Symposium on Nanoscale Architectures, NANOARCH 2023 (Dresden, DEU, 18. Dezember 2023 - 20. Dezember 2023)
  In: ACM International Conference Proceeding Series 2023
  DOI: 10.1145/3611315.3633266
• Pfenning S., Simpetru R., Pollak N., Del Vecchio A., Fey D.:
  EVALUATION OF GPU-CENTRIC EMBEDDED ARCHITECTURES IN THE FIELD OF NEUROMUSCULAR EMG-BASED AI
  20th International Conference Applied Computing, AC 2023 and the 22nd International Conference WWW/Internet, ICWI 2023 (Funchal, Madeira Island, PRT, 21. Oktober 2023 - 23. Oktober 2023)
  In: International Conferences on Applied Computing 2023, AC 2023 and WWW/Internet 2023, ICWI 2023 2023
• Reuben JR., Fey D., Lancaster S., Slesazeck S.:
  A Low-Power Ternary Adder Using Ferroelectric Tunnel Junctions
  In: Electronics 12 (2023), Art.Nr.: 1163
  ISSN: 2079-9292
  DOI: 10.3390/electronics12051163
• Reuben JR., Fey D., Slesazeck S.:
  A Reference-less Sense Amplifier to Sense pA Currents in Ferroelectric Tunnel Junction Memories
  12th International Conference on Modern Circuits and Systems Technologies, MOCAST 2023 (Athens, 28. Juni 2023 - 30. Juni 2023)
  In: 2023 12th International Conference on Modern Circuits and Systems Technologies, MOCAST 2023 - Proceedings 2023
  DOI: 10.1109/MOCAST57943.2023.10176774
• Ringlein B., Abel F., Diamantopoulos D., Weiss B., Hagleitner C., Fey D.:
  Advancing Compilation of DNNs for FPGAs Using Operation Set Architectures
  In: IEEE Computer Architecture Letters 22 (2023), S. 9-12
  ISSN: 1556-6056
  DOI: 10.1109/LCA.2022.3227643
• Ringlein B., Abel F., Diamantopoulos D., Weiss B., Hagleitner C., Fey D.:
  DOSA: Organic Compilation for Neural Network Inference on Distributed FPGAs
  7th IEEE International Conference on Edge Computing and Communications, EDGE 2023 (Hybrid, Chicago, IL, USA, 2. Juli 2023 - 8. Juli 2023)
  In: Claudio Ardagna, Feras Awaysheh, Hongyi Bian, Carl K. Chang, Rong N. Chang, Flavia Delicato, Nirmit Desai, Jing Fan, Geoffrey C. Fox, Andrzej Goscinski, Zhi Jin, Anna Kobusinska, Omer Rana (Hrsg.): Proceedings - IEEE International Conference on Edge Computing 2023
  DOI: 10.1109/EDGE60047.2023.00019
• Rottermann K., Doll U., Pfenning S., Reichenbach M., Fey D., Dobler A., Siauw C., Reif F., Gnibl J., Cesnjevar R., Dittrich S.:
  The Congenital Cardiology Cloud - Optimizing long-term care by connecting ambulatory and hospital medical attendance via telemedicine
  In: Klinische Pädiatrie (2023)
  ISSN: 0300-8630
  DOI: 10.1055/a-2154-6659

2022

• Giahi F., Rachuj S., Fey D.:
  Investigating SAMV Regarding its Suitability For FPGAs
  2022 IEEE 35th International System-on-Chip Conference (SOCC) (Belfast, 5. Oktober 2022 - 8. Oktober 2022)
  In: 2022 IEEE 35th International System-on-Chip Conference (SOCC), Belfast, United Kingdom: 2022
  DOI: 10.1109/SOCC56010.2022.9908124
• Lex J., Margull U., Fey D., Mader R.:
  Fault Tolerance in Heterogeneous Automotive Real-time Systems
  Fachtagung des Echtzeitkommunikation, Echtzeit 2021 (Boppard, DEU, 21. November 2020 - 22. November 2020)
  In: Herwig Unger, Marcel Schaible (Hrsg.): Informatik aktuell 2022
  DOI: 10.1007/978-3-658-37751-9_9
• Reiser D., Reichel P., Pechmann S., Mallah M., Oppelt MP., Hagelauer A., Breiling M., Fey D., Reichenbach M.:
  A Framework for Ultra Low-Power Hardware Accelerators Using NNs for Embedded Time Series Classification
  In: Journal of Low Power Electronics and Applications 12 (2022)
  ISSN: 2079-9268
  DOI: 10.3390/jlpea12010002
• Schwenger L., Holzinger P., Fey D., Hernandez HGM., Reichenbach M.:
  EasyHBM: Simple and Fast HBM Access for FPGAs Using High-Level-Synthesis
  22nd International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation, SAMOS 2021 (Samos, GRC, 3. Juli 2022 - 7. Juli 2022)
  In: Alex Orailoglu, Marc Reichenbach, Matthias Jung (Hrsg.): Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics) 2022
  DOI: 10.1007/978-3-031-15074-6_3

2021

• Fey D., Reuben JR., Slesazeck S.:
  Comparative study of usefulness of FeFET, FTJ and ReRAM technology for ternary arithmetic
  28th IEEE International Conference on Electronics, Circuits, and Systems (IEEE ICECS) (Dubai, U ARAB EMIRATES)
  In: 2021 28TH IEEE INTERNATIONAL CONFERENCE ON ELECTRONICS, CIRCUITS, AND SYSTEMS (IEEE ICECS 2021), NEW YORK: 2021
  DOI: 10.1109/ICECS53924.2021.9665635
• Fritscher M., Knödtel J., Reiser D., Mallah M., Pechmann S., Fey D., Reichenbach M.:
  Simulating large neural networks embedding MLC RRAM as weight storage considering device variations
  In: Proc. of 12th IEEE Latin America Symposium on Circuits and System 2021
  DOI: 10.1109/lascas51355.2021.9459159
• Hosseinzadeh S., Biglari M., Fey D.:
  TReMo+: Modeling Ternary and Binary ReRAM-Based Memories With Flexible Write-Verification Mechanisms
  In: Frontiers in Nanotechnology 3 (2021), Art.Nr.: 765947
  ISSN: 2673-3013
  DOI: 10.3389/fnano.2021.765947
• Koelewijn A., Audu M., del Ama AJ., Colucci A., Font-Llagunes JM., Gogeascoechea A., Hnat SK., Moreno JC., Nandor M., Quinn R., Reichenbach M., Reyes RD., Sartori M., Soekadar SR., Triolo RJ., Vermehren M., Wenger C., Yavuz US., Makowski N., Fey D., Beckerle P.:
  Adaptation Strategies for Personalized Gait Neuroprosthetics
  In: Frontiers in Neurorobotics 15 (2021), Art.Nr.: 750519
  ISSN: 1662-5218
  DOI: 10.3389/fnbot.2021.750519
• Prabahar JR., Fey D.:
  Carry-free Addition in Resistive RAM Array: n-bit Addition in 22 Memory Cycles
  20th IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2021 (Tampa, FL, USA, 7. Juli 2021 - 9. Juli 2021)
  In: Proceedings of IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2021
  DOI: 10.1109/ISVLSI51109.2021.00038
• Reichenbach M., Knödtel J., Rachuj S., Fey D.:
  RISC-V3: A RISC-V Compatible CPU with a Data Path Based on Redundant Number Systems
  In: IEEE Access (2021), S. 1-1
  ISSN: 2169-3536
  DOI: 10.1109/ACCESS.2021.3063238
• Ringlein B., Abel F., Diamantopoulos D., Weiss B., Hagleitner C., Reichenbach M., Fey D.:
  A Case for Function-As-A-Service with Disaggregated FPGAs
  14th IEEE International Conference on Cloud Computing, CLOUD 2021 (Online, 5. September 2021 - 11. September 2021)
  In: Claudio Agostino Ardagna, Carl K. Chang, Ernesto Daminai, Rajiv Ranjan, Zhongjie Wang, Robert Ward, Jia Zhang, Wensheng Zhang (Hrsg.): IEEE International Conference on Cloud Computing, CLOUD 2021
  DOI: 10.1109/CLOUD53861.2021.00047
• Vaas S., Ulbrich P., Eichler C., Wägemann P., Reichenbach M., Fey D.:
  Taming Non-Deterministic Low-Level I/O: Predictable Multi-Core Real-Time Systems by SoC Co-Design
  2021 IEEE 24th International Symposium on Real-Time Distributed Computing (ISORC)
  DOI: 10.1109/isorc52013.2021.00017
  URL: https://www4.cs.fau.de/Publications/2021/vaas_21_isorc.pdf

2020

• Can Y., Yaz O., Fey D.:
  Disjoint Sum of Products by Orthogonalizing Difference-Building circle minus
  In: Open Engineering 10 (2020), S. 586-594
  ISSN: 2391-5439
  DOI: 10.1515/eng-2020-0067
• Fey D., Karl W., Ungerer T.:
  Memristoren für zukünftige Rechnersysteme
  In: Informatik-Spektrum (2020)
  ISSN: 0170-6012
  DOI: 10.1007/s00287-020-01261-8
• Fey D., Reuben JR.:
  Direct state transfer in MLC based memristive ReRAM devices for ternary computing
  24th IEEE European Conference on Circuit Theory and Design, ECCTD 2020 (Sofia, 7. September 2020 - 10. September 2020)
  In: ECCTD 2020 - 24th IEEE European Conference on Circuit Theory and Design 2020
  DOI: 10.1109/ECCTD49232.2020.9218323
• Hofmann J., Alappat C., Hager G., Fey D., Wellein G.:
  Bridging the architecture gap: Abstracting performance-relevant properties of modern server processors
  In: Supercomputing Frontiers and Innovations 7 (2020), S. 54-78
  ISSN: 2409-6008
  DOI: 10.14529/jsfi200204
• Hosseinzadeh S., Biglari M., Fey D.:
  TReMo: A Model for Ternary ReRAM-Based Memories with Adjustable Write-Verification Capabilities
  In: 2020 23rd Euromicro Conference on Digital System Design (DSD) 2020
  DOI: 10.1109/DSD51259.2020.00019
  URL: https://ieeexplore.ieee.org/document/9217865
• Jordan H., Gschwandtner P., Thoman P., Zangerl P., Hirsch A., Fahringer T., Heller T., Fey D.:
  The allscale framework architecture
  In: Parallel Computing (2020), Art.Nr.: 102648
  ISSN: 0167-8191
  DOI: 10.1016/j.parco.2020.102648
• Knödtel J., Fritscher M., Reiser D., Fey D., Breiling M., Reichenbach M.:
  A Model-to-Circuit Compiler for Evaluation of DNN Accelerators based on Systolic Arrays and Multibit Emerging Memories
  9th International Conference on Modern Circuits and Systems Technologies, MOCAST 2020 (Bremen, 7. September 2020 - 9. September 2020)
  In: 9th International Conference on Modern Circuits and Systems Technologies, {MOCAST} 2020, Bremen, Germany, September 7-9, 2020 2020
  DOI: 10.1109/MOCAST49295.2020.9200241
• Rachuj S., Fey D., Reichenbach M.:
  Impact of Performance Estimation on Fast Processor Simulators
  12th EAI International Conference on Simulation Tools and Techniques, SIMUTOOLS 2020 (Guiyang / Online, 28. August 2020 - 30. August 2020)
  In: Houbing Song; Dingde Jiang (Hrsg.): Simulation Tools and Techniques 2020
  DOI: 10.1007/978-3-030-72795-6_7
  URL: https://link.springer.com/chapter/10.1007/978-3-030-72795-6_7
• Reuben JR., Biglari M., Fey D.:
  Incorporating Variability of Resistive RAM in Circuit Simulations Using the Stanford-PKU Model
  In: IEEE Transactions on Nanotechnology 19 (2020), S. 508-518
  ISSN: 1536-125X
  DOI: 10.1109/TNANO.2020.3004666
• Ringlein B., Abel F., Ditter A., Weiss B., Hagleitner C., Fey D.:
  Programming Reconfigurable Heterogeneous Computing Clusters Using MPI with Transpilation
  6th IEEE/ACM International Workshop on Heterogeneous High-Performance Reconfigurable Computing, H2RC 2020 (, 13. November 2020)
  In: Proceedings of H2RC 2020: 6th International Workshop on Heterogeneous High-Performance Reconfigurable Computing, Held in conjunction with SC 2020: The International Conference for High Performance Computing, Networking, Storage and Analysis 2020
  DOI: 10.1109/H2RC51942.2020.00006
• Ringlein B., Abel F., Ditter A., Weiss B., Hagleitner C., Fey D.:
  ZRLMPI: A Unified Programming Model for Reconfigurable Heterogeneous Computing Clusters
  28th Annual IEEE International Symposium on Field-Programmable Custom Computing Machines, FCCM 2020 (Fayetteville, AR, 3. Mai 2020 - 6. Mai 2020)
  In: Proceedings - 28th IEEE International Symposium on Field-Programmable Custom Computing Machines, FCCM 2020 2020
  DOI: 10.1109/FCCM48280.2020.00051

2019

• Ali R., Mallah M., Leyh M., Holzinger P., Breiling M., Reichenbach M., Fey D.:
  A Hardware Inference Accelerator for Temporal Convolutional Networks
  2019 IEEE Nordic Circuits and Systems Conference (NORCAS): NORCHIP and International Symposium of System-on-Chip (SoC) (Helsinki, 29. Oktober 2019 - 30. Oktober 2019)
  In: IEEE (Hrsg.): Proceedings of Nordic Circuits and Systems Conference (NORCAS): NORCHIP and International Symposium of System-on-Chip (SoC), 2019 IEEE 2019
  DOI: 10.1109/NORCHIP.2019.8906963
  URL: https://ieeexplore.ieee.org/document/8906963
• Bauer W., Holzinger P., Rachuj S., Häublein K., Reichenbach M., Fey D.:
  Evaluating HSA-Compatible Heterogeneous Systems for ADAS Applications
  ARCS 2019: 32nd International Conference on Architecture of Computing Systems (Copenhagen, Denmark, 20. Mai 2019 - 24. Mai 2019)
  In: Trinitis, Carsten; Pionteck, Thilo (Hrsg.): Workshop Proceedings 2019
• Bauer W., Holzinger P., Reichenbach M., Vaas S., Hartke P., Fey D.:
  Programmable HSA Accelerators for Zynq UltraScale+ MPSoC Systems
  Euro-Par 2018: Parallel Processing Workshops - Euro-Par 2018 International Workshops
  In: Mencagli G, B. Heras D, Cardellini V, Casalicchio E, Jeannot E, Wolf F, Salis A, Schifanella C, Manumachu RR, Ricci L, Beccuti M, Antonelli L, Garcia Sanchez JD, Scott SL (Hrsg.): Euro-Par 2018: Parallel Processing Workshops, Cham: 2019
  DOI: 10.1007/978-3-030-10549-5_57
• Biglari M., Lieske T., Fey D.:
  Reducing Hibernation Energy and Degradation in Bipolar ReRAM-Based Non-Volatile Processors
  In: IEEE Transactions on Nanotechnology (2019)
  ISSN: 1536-125X
  DOI: 10.1109/TNANO.2019.2922363
• Ditter A., Tielemann M., Fey D.:
  Bridging the gap between high-performance, cloud and service-oriented computing
  4th IEEE International Workshops on Foundations and Applications of Self* Systems, FAS*W 2019 (Umea, SWE, 16. Juni 2019 - 20. Juni 2019)
  In: Proceedings - 2019 IEEE 4th International Workshops on Foundations and Applications of Self* Systems, FAS*W 2019 2019
  DOI: 10.1109/FAS-W.2019.00029
• Fritscher M., Knödtel J., Reichenbach M., Fey D.:
  Simulating memristive systems in mixed-signal mode using commercial design tools
  26th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2019 (Genoa, 27. November 2019 - 29. November 2019)
  In: 2019 26th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2019 2019
  DOI: 10.1109/ICECS46596.2019.8964856
• Häublein K., Brückner W., Vaas S., Rachuj S., Reichenbach M., Fey D.:
  Utilizing PYNQ for Accelerating Image Processing Functions in ADAS Applications
  ARCS 2019: 32nd International Conference on Architecture of Computing Systems (Copenhagen, 20. Mai 2019 - 24. Juni 2019)
• Peschel J., Knödtel J., Pérez E., Reichenbach M., Wenger C., Fey D.:
  Optimizing Multi-State Reliability in ReRAM Arrays using an Automated Device Selection Method
  MEMRISYS 2019 International Conference on Memristive Materials, Devices & Systems (International Congress Center Dresden, 8. Juli 2019 - 11. Juli 2019)
• Rachuj S., Reichenbach M., Fey D.:
  A generic functional simulation of heterogeneous systems
  32nd International Conference on Architecture of Computing Systems, ARCS 2019 (Copenhagen, 20. Mai 2019 - 23. Mai 2019)
  In: Martin Schoeberl, Thilo Pionteck, Sascha Uhrig, Jürgen Brehm, Christian Hochberger (Hrsg.): Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics) 2019
  DOI: 10.1007/978-3-030-18656-2_10
• Reuben JR., Fey D.:
  A Time-based Sensing Scheme for Multi-level Cell (MLC) Resistive RAM
  5th IEEE Nordic Circuits and Systems Conference, NORCAS 2019: NORCHIP and International Symposium of System-on-Chip, SoC 2019 (Helsinki, 29. Oktober 2019 - 30. Oktober 2019)
  In: Jari Nurmi, Peeter Ellervee, Kari Halonen, Juha Roning (Hrsg.): 2019 IEEE Nordic Circuits and Systems Conference, NORCAS 2019: NORCHIP and International Symposium of System-on-Chip, SoC 2019 - Proceedings 2019
  DOI: 10.1109/NORCHIP.2019.8906921
• Reuben JR., Fey D., Wenger C.:
  A modeling methodology for resistive RAM based on stanford-PKU model with extended multilevel capability
  In: IEEE Transactions on Nanotechnology 18 (2019), S. 647-656
  ISSN: 1536-125X
  DOI: 10.1109/TNANO.2019.2922838
• Ringlein B., Abel F., Ditter A., Weiss B., Hagleitner C., Fey D.:
  System architecture for network-attached FPGAs in the cloud using partial reconfiguration
  29th International Conferenceon Field-Programmable Logic and Applications, FPL 2019 (Barcelona, 9. September 2019 - 13. September 2019)
  In: Ioannis Sourdis, Christos-Savvas Bouganis, Carlos Alvarez, Leonel Antonio Toledo Diaz, Pedro Valero, Xavier Martorell (Hrsg.): Proceedings - 29th International Conference on Field-Programmable Logic and Applications, FPL 2019 2019
  DOI: 10.1109/FPL.2019.00054
• Vaas S., Ulbrich P., Reichenbach M., Fey D.:
  Application-Specific Tailoring of Multi-Core SoCs for Real-Time Systems with Diverse Predictability Demands
  In: Journal of Signal Processing Systems (2019)
  ISSN: 1939-8018
  DOI: 10.1007/s11265-018-1389-0

2018

• Biglari M., Lieske T., Fey D.:
  High-Endurance Bipolar ReRAM-Based Non-Volatile Flip-Flops with Run-Time Tunable Resistive States
  14th IEEE/ACM International Symposium on Nanoscale Architectures (Athens, Greece)
  In: Proceedings of the 14th IEEE/ACM International Symposium on Nanoscale Architectures, New York, NY, USA: 2018
  DOI: 10.1145/3232195.3232217
  URL: http://doi.acm.org/10.1145/3232195.3232217
• Fey D., Hannig F.:
  Special Issue on Heterogeneous Real-Time Image Processing
  In: Journal of Real-Time Image Processing 14 (2018), S. 513-515
  ISSN: 1861-8200
  DOI: 10.1007/s11554-018-0763-2
• Fey D., Riedersberger L., Reichenbach M.:
  Simulating Memristive Networks in SystemC-AMS
  In: Memristor and Memristive Neural Networks, -: InTech, 2018, S. Chapter 7
  ISBN: 978-953-51-3947-8
  DOI: 10.5772/intechopen.69662
  URL: https://mts.intechopen.com/books/memristor-and-memristive-neural-networks/simulating-memristive-networks-in-systemc-ams
• Hamdioui S., Gaillardon PE., Fey D., Simunic RT.:
  Guest Editorial Memristive-Device-Based Computing
  In: IEEE Transactions on Very Large Scale Integration (Vlsi) Systems 26 (2018), S. 2581--2583
  ISSN: 1063-8210
  DOI: 10.1109/TVLSI.2018.2878679
• Hartmann C., Fey D.:
  An extended analysis of memory hierarchies for efficient implementations of image processing applications
  In: Journal of Real-Time Image Processing 14 (2018), S. 713--728
  ISSN: 1861-8200
  DOI: 10.1007/s11554-017-0723-2
• Hartmann C., Häublein K., Reichenbach M., Fey D.:
  IPAS: a design framework for analysis, synthesis and optimization of image processing applications for heterogenous computing architectures
  In: Journal of Real-Time Image Processing 14 (2018), S. 549--564
  ISSN: 1861-8200
  DOI: 10.1007/s11554-016-0587-x
• Hofmann J., Hager G., Fey D.:
  On the Accuracy and Usefulness of Analytic Energy Models for Contemporary Multicore Processors
  High Performance Computing: 33rd International Conference, ISC High Performance 2018 (Frankfurt, 24. Juni 2018 - 28. Juni 2018)
  In: High Performance Computing: 33rd International Conference, ISC High Performance 2018, Cham: 2018
  DOI: 10.1007/978-3-319-92040-5_2
• Holzinger P., Reichenbach M., Fey D.:
  A New Generic HLS Approach for Heterogeneous Computing: On the Feasibility of High-Level Synthesis in HSA-Compatible Systems
  SAMOS XVIII: 2018 International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation (Pythagorion, Samos Island, 15. Juli 2018 - 19. Juli 2018)
  In: Mudge Trevor, Pnevmatikatos Dionisios N. (Hrsg.): SAMOS XVIII: 2018 International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation, New York, NY, USA: 2018
  DOI: 10.1145/3229631.3229634
  URL: https://dl.acm.org/citation.cfm?doid=3229631.3229634
• Jordan H., Heller T., Gschwandtner P., Zangerl P., Thoman P., Fey D., Fahringer T.:
  The AllScale Runtime Application Model
  In: IEEE International Conference on Cluster Computing, CLUSTER 2018, Belfast, UK, September 10-13, 2018 2018
  DOI: 10.1109/CLUSTER.2018.00088
• Knödtel J., Schwabe W., Lieske T., Reichenbach M., Fey D.:
  A Novel Methodology for Evaluating the Energy Consumption of IP Blocks in System-Level Designs
  28th International Symposium on Power and Timing Modeling, Optimization and Simulation (Platja D’Aro, 2. Juli 2018 - 4. Juli 2018)
  In: 2018 28th International Symposium on Power and Timing Modeling, Optimization and Simulation (PATMOS) 2018
  DOI: 10.1109/PATMOS.2018.8464149
• Lieske T., Biglari M., Fey D.:
  Multi-Level Memristive Voltage Divider: Programming Scheme Trade-offs
  International Symposium on Memory Systems (MEMSYS) (Alexandria, Virginia, 1. Oktober 2018 - 4. Oktober 2018)
  In: Proceedings of the International Symposium on Memory Systems, New York, NY, USA: 2018
  DOI: 10.1145/3240302.3240430
  URL: http://doi.acm.org/10.1145/3240302.3240430
• Lieske T., Uhring W., Dumas N., Skilitsi AI., Leonard J., Fey D.:
  Embedded Fluorescence Lifetime Determination for High-Throughput, Low-Photon-Number Applications
  In: Journal of Signal Processing Systems 91 (2018), S. 819--831
  ISSN: 1939-8018
  DOI: 10.1007/s11265-018-1372-9
• Maliszewski AM., Griebler D., Schepke C., Ditter A., Fey D., Fernandes LG.:
  The NAS Benchmark Kernels for Single and Multi-Tenant Cloud Instances with LXC/KVM
  16th International Conference on High Performance Computing and Simulation, HPCS 2018 (Orléans, 16. Juli 2018 - 20. Juli 2018)
  In: 2018 International Conference on High Performance Computing Simulation (HPCS) 2018
  DOI: 10.1109/HPCS.2018.00066
• Rachuj S., Bauer W., Fey D.:
  Evaluation of a Sensor Fusion Algorithm on a Real-Time Processor
  AmE 2018 - Automotive meets Electronics (Dortmund)
  In: AmE 2018 - Automotive meets Electronics 2018
• Rachuj S., Herglotz C., Reichenbach M., Kaup A., Fey D.:
  A Hybrid Approach for Runtime Analysis Using a Cycle and Instruction Accurate Model
  Architecture of Computing Systems (ARCS) (Braunschweig, 9. April 2018 - 12. April 2018)
  In: Mladen Berekovic, Rainer Buchty, Heiko Hamann, Dirk Koch, Thilo Pionteck (Hrsg.): 31st International Conference on Architecture of Computing Systems (ARCS) 2018
  DOI: 10.1007/978-3-319-77610-1_7
  URL: http://arcs2018.itec.kit.edu/
• Rachuj S., Reichenbach M., Vaas S., Fey D.:
  Autonomous Driving in the Curriculum of Computer Architecture
  12th European Workshop on Microelectronics Education (Braunschweig, 24. September 2018 - 26. September 2018)
  In: Proceedings of the 12th European Workshop on Microelectronics Education 2018
  DOI: 10.1109/ewme.2018.8629484
• Reichenbach M., Holzinger P., Häublein K., Lieske T., Blinzer P., Fey D.:
  Heterogeneous Computing Utilizing FPGAs
  In: Journal of Signal Processing Systems 91 (2018), S. 745--757
  ISSN: 1939-8018
  DOI: 10.1007/s11265-018-1382-7
• Reichenbach M., Liebischer L., Vaas S., Fey D.:
  Comparison of Lane Detection Algorithms for ADAS using Embedded Hardware Architectures
  Conference on Design and Architectures for Signal and Image Processing (DASIP) (Porto, 9. Oktober 2018 - 12. Oktober 2018)
  In: Proceedings of 2018 Conference on Design and Architectures for Signal and Image Processing (DASIP), Porto: 2018
  DOI: 10.1109/DASIP.2018.8596994
• Schwarzmeier C., Ditter A., Fey D.:
  Distributed Asynchronous Jacobi Methods
  International Symposium on Computational Science at Scale (Erlangen, 5. September 2018 - 7. September 2018)
  URL: https://www10.cs.fau.de/publications/posters/2018/Schwarzmeier_CoSaS_2018.pdf
• Söll C., Reichenbach M., Röber J., Hagelauer AM., Weigel R., Fey D.:
  Case Study on Memristor-Based Multilevel Memories
  In: International Journal of Circuit Theory and Applications 46 (2018), S. 99-112
  ISSN: 0098-9886
  DOI: 10.1002/cta.2379
• Widerspick C., Bauer W., Fey D.:
  Latency Measurements for an Emulation Platform on Autonomous Driving Platform NVIDIA Drive PX2
  In: ARCS Workshop 2018; 31th International Conference on Architecture of Computing Systems 2018
• Wust D., Fey D., Knödtel J.:
  A programmable ternary CPU using hybrid CMOS/memristor circuits
  In: International Journal of Parallel, Emergent and Distributed Systems (2018), S. 1--21
  ISSN: 1744-5760
  DOI: 10.1080/17445760.2017.1422251

2017

• Biglari M., Fey D.:
  A Non-Volatile Flip-Flop Using Memristive Voltage Divider
  IEEE/ACM Design Automation and Test in Europe (DATE), Workshop on Emerging Memory Solutions - Technology, Manufacturing, Architectures, Design and Test (Lausanne, 31. März 2017 - 31. März 2017)
• Biglari M., Fey D.:
  Memristive Voltage Divider: A Bipolar ReRAM-based Unit for Non-Volatile Flip-Flops
  The International Symposium on Memory Systems (MEMSYS) (Alexandria, VA, 2. Oktober 2017 - 5. Oktober 2017)
  In: MEMSYS'17 Proceedings of the International Symposium on Memory Systems 2017
  DOI: 10.1145/3132402.3132432
  URL: https://dl.acm.org/citation.cfm?id=3132432
• Ditter A., Graf G., Fey D.:
  Fe2vCl2: From Bare Metal to High Performance Computing on Virtual Clusters and Cloud Infrastructure
  4th Workshop on CrossCloud Infrastructures and Platforms, CrossCloud 2017 (Belgrad, 23. April 2017)
  In: Proceedings of the 4th Workshop on CrossCloud Infrastructures & Platforms, New York, NY, USA: 2017
  DOI: 10.1145/3069383.3069386
  URL: http://doi.acm.org/10.1145/3069383.3069386
• Ditter A., Schönwetter D., Kuzmin A., Fey D., Aizinger V.:
  Memory Analysis and Performance Modeling for HPC Applications on Embedded Hardware via Instruction Accurate Simulation
  Federated Conference on Software Development and Object Technologies, SDOT 2015 (Žilina, 19. November 2015 - 20. November 2015)
  In: Proceedings of the 2015 Federated Conference on Software Development and Object Technologies, Cham: 2017
  DOI: 10.1007/978-3-319-46535-7_2
• Du Nguyen H., Yu J., Xie L., Taouil M., Hamdioui S., Fey D.:
  Memristive Devices for Computing: Beyond CMOS and Beyond von Neumann
  25th IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC) (Abu Dhabi)
  In: Proceedings 2017
• Fey D., Hartmann C., Widerspick C.:
  A Methodology to Estimate the Energy Consumption and Processing Time for Image Processing Algorithms in Advanced Driver Assistance Systems
  ARCS 2017: 30th International Conference on Architecture of Computing Systems (Wien)
  In: Workshop Proceedings, Wien: 2017
• Hartmann C., Fey D.:
  An Extended Analysis of Memory Hierarchies for Efficient Implementations of Image Processing Applications
  In: Journal of Real-Time Image Processing (2017), S. 1-16
  ISSN: 1861-8200
  DOI: 10.1007/s11554-017-0723-2
  URL: https://link.springer.com/article/10.1007/s11554-017-0723-2
• Hartmann C., Häublein K., Pfundt B., Reichenbach M., Fey D.:
  An Image Processing Operator Language for Design and Synthesis of Smart Camera Architectures
  Parallel-Algorithmen und Rechnerstrukturen (Hagen)
  In: Mitteilungen - Gesellschaft für Informatik e.V. 2017
• Hofmann J., Fey D., Riedmann M., Eitzinger J., Hager G., Wellein G.:
  Performance analysis of the Kahan-enhanced scalar product on current multi-core and many-core processors
  In: Concurrency and Computation-Practice & Experience 29 (2017)
  ISSN: 1532-0626
  DOI: 10.1002/cpe.3921
• Hofmann J., Hager G., Wellein G., Fey D.:
  An Analysis of Core- and Chip-Level Architectural Features in Four Generations of Intel Server Processors
  32nd International Conference on High Performance Computing: ISC High Performance 2017 (Frankfurt)
  In: High Performance Computing. ISC 2017. Lecture Notes in Computer Science, vol 10266, Cham: 2017
  DOI: 10.1007/978-3-319-58667-0_16
• Kohl J., Bauer W., Bäsig J., Fey D.:
  Evaluating a Simulation based PLC Processor Optimization
  15th Annual Industrial Simulation Conference (Warsaw, Poland)
  In: ISC 2017 2017
• Kohl J., Bauer W., Bäsig J., Rübesam S., Fey D.:
  Processor Error Detection Capabilities of Random Programs
  Testmethoden und Zuverlässigkeit von Schaltungen und Systemen (Lübeck, Germany)
  In: Tagungsband TuZ 2017 2017
• Kuckuk S., Leitenmaier L., Schmitt C., Schönwetter D., Köstler H., Fey D.:
  Towards Virtual Hardware Prototyping for Generated Geometric Multigrid Solvers
  CS 2017-01 (2017), S. 1-8
  ISSN: 2191-5008
  Open Access: http://nbn-resolving.de/urn:nbn:de:bvb:29-opus4-83179
  URL: http://nbn-resolving.de/urn:nbn:de:bvb:29-opus4-83179
  (Techreport)
• Lieske T., Pfundt B., Vaas S., Reichenbach M., Fey D.:
  System on Chip Generation for Multi-Sensor and Sensor Fusion Applications
  17th International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation (SAMOS) (Island of Samos, Greece)
  In: Proceedings of the 17th International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation (SAMOS) 2017
  DOI: 10.1109/SAMOS.2017.8344607
  URL: https://ieeexplore.ieee.org/document/8344607/
• Lieske T., Uhring W., Dumas N., Leonard J., Fey D.:
  Embedded Fluorescence Lifetime Determination for High Throughput Real-Time Droplet Sorting with Microfluidics
  Conference on Design and Architectures for Signal and Image Processing (DASIP) (Dresden)
  In: Proceedings of 2017 Conference on Design and Architectures for Signal and Image Processing (DASIP) 2017
  DOI: 10.1109/DASIP.2017.8122129
• Pfundt B., Reichenbach M., Fey D.:
  Comprehensive curriculum for reconfigurable heterogeneous computer architecture education
  In: IET Circuits Devices & Systems 11 (2017), S. 292-298
  ISSN: 1751-858X
  DOI: 10.1049/iet-cds.2016.0399
• Rachuj S., Hartmann C., Fey D.:
  Evaluation of a Processor Simulator Exemplified by a Radar Processing Algorithm
  ARCS 2017: 30th International Conference on Architecture of Computing Systems (Wien)
  In: Workshop Proceedings, Wien: 2017
• Reichenbach M., Holzinger P., Häublein K., Lieske T., Blinzer P., Fey D.:
  LibHSA: One Step Towards Mastering the Era of Heterogeneous Hardware Accelerators using FPGAs
  2017 Conference on Design and Architectures for Signal and Image Processing (DASIP)
  DOI: 10.1109/DASIP.2017.8122108
• Reichenbach M., Kasparek M., Häublein K., Bauer JN., Alawieh M., Fey D.:
  Fast heterogeneous computing architectures for smart antennas
  In: Journal of Systems Architecture (2017)
  ISSN: 1383-7621
  DOI: 10.1016/j.sysarc.2016.11.004
• Vaas S., Ulbrich P., Reichenbach M., Fey D.:
  The Best of Both: High-performance and Deterministic Real-Time Executive by Application-Specific Multi-Core SoCs
  Conference on Design and Architectures for Signal and Image Processing (DASIP '17) (Dresden, 27. September 2017 - 29. September 2017)
  In: Proceedings of the Conference on Design and Architectures for Signal and Image Processing (DASIP '17), Los Alamitos, CA: 2017
  DOI: 10.1109/DASIP.2017.8122107
• Widerspick C., Fey D., Hartmann C.:
  Estimation of Time Behaviour of Selected Autonomous Driving Algorithms using GPGPU-Sim
  ARCS 2017: 30th International Conference on Architecture of Computing Systems (Wien)
  In: Workshop Proceedings, Wien: 2017
• Wust D., Biglari M., Knödtel J., Reichenbach M., Söll C., Fey D.:
  Prototyping Memristors in Digital Systems with an FPGA-Based Testing Environment
  International Symposium on Power and Timing Modeling, Optimization and Simulation (Thessaloniki, 25. September 2017 - 27. September 2017)
  In: Power and Timing Modeling, Optimization and Simulation (PATMOS), 2017 27th International Symposium on 2017
  DOI: 10.1109/PATMOS.2017.8106978
  URL: http://ieeexplore.ieee.org/document/8106978/
• Wust D., Söll C., Fey D.:
  A fast general purpose CPU utilizing signed-digit encoding and multi-bit memristors
  HiPEAC Workshop on Memristor Technology, Design, Automation and Computing

2016

• Bauer W., Kohl J., Bäsig J., Rübesam S., Fey D.:
  Generation of Executable Runtime Constrained Random Programs Functional Processor Verification
  The European Simulation and Modelling Conferences (Gran Canaria, Spain, 26. Oktober 2016 - 28. Oktober 2016)
  In: ESM 2016 2016
• Fey D., Reichenbach M., Söll C., Biglari M., Röber J., Weigel R.:
  Using Memristor Technology for Multi-value Registers in Signed-digit Arithmetic Circuits
  The International Symposium on Memory Systems (MEMSYS) (Alexandria, VA, 3. Oktober 2016 - 6. Oktober 2016)
  In: Proceedings of the Second International Symposium on Memory Systems 2016
  DOI: 10.1145/2989081.2989124
  URL: https://dl.acm.org/citation.cfm?id=2989124
• Fey D., Reichenbach M., Söll C., Weigel R.:
  Evaluating Signed-digit Arithmetic Circuits using Multi-level storing Memristors
  HIPEAC Workshop on Memristor Technology, Design, Automation and Computing (Prague)
• Hannig F., Cardoso J., Fey D., Schröder-Preikschat W., Teich J.:
  Architecture of computing systems – ARCS 2016: 29th international conference Nuremberg, Germany, April 4-7, 2016 Proceedings
  Springer Verlag, 2016
  ISBN: 9783319306940
  DOI: 10.1007/978-3-319-30695-7
• Hannig F., Cardoso JMP., Pionteck T., Fey D., Schröder-Preikschat W., Teich J. (Hrsg.):
  Proceedings of the 29th International Conference on Architecture of Computing Systems (ARCS)
  Berlin; Heidelberg: 2016
  (Lecture Notes in Computer Science (LNCS), Bd. 9637)
  ISBN: 978-3-319-30694-0
  DOI: 10.1007/978-3-319-30695-7
• Hartmann C., Häublein K., Reichenbach M., Fey D.:
  IPAS: a design framework for analysis, synthesis and optimization of image processing applications for heterogenous computing architectures
  In: Journal of Real-Time Image Processing (2016), S. 1-16
  ISSN: 1861-8200
  DOI: 10.1007/s11554-016-0587-x
  URL: http://link.springer.com/article/10.1007/s11554-016-0587-x
• Hendricks Arne, Heller Thomas, Schäfer Andreas, Max Kasparek, Fey Dietmar:
  Evaluating Performance and Energy-efficiency of a Parallel Signal Correlation Algorithm on Current Multi and Manycore Architectures
  International Conference on Computational Science 2016 (San Diego, California, USA, 6. Juni 2016 - 8. Juni 2016)
  In: Proceedings of International Conference on Computational Science 2016 (ICCS 2016), Amsterdam: 2016
  DOI: 10.1016/j.procs.2016.05.484
  URL: http://www.sciencedirect.com/science/article/pii/S1877050916309693
• Hendricks Arne, Heller Thomas, Jordan Herbert, Thoman Peter, Fahringer Thomas, Fey Dietmar:
  The AllScale Runtime Interface: Theoretical Foundation and Concept
  9th MTAGS (Salt Lake City, UTAH, USA)
  In: 9th Workshop on Many-Task Computing on Clouds, Grids, and Supercomputers as part of SC16, New York: 2016
  DOI: 10.1109/MTAGS.2016.4
  URL: https://sites.google.com/site/mtags2016/
• Hofmann J., Fey D.:
  An ECM-based Energy-efficiency Optimization Approach for Bandwidth-limited Streaming Kernels on Recent Intel Xeon Processors
  4th International Workshop on Energy Efficient Supercomputing (Salt Lake City, UT, USA, 13. November 2016 - 18. November 2016)
  In: Proceedings of the 4th International Workshop on Energy Efficient Supercomputing 2016
  DOI: 10.1109/E2SC.2016.16
• Hofmann J., Fey D., Eitzinger J., Hager G., Wellein G.:
  Analysis of intel’s haswell microarchitecture using the ECM model and microbenchmarks
  Springer Verlag, 2016
  ISBN: 9783319306940
  DOI: 10.1007/978-3-319-30695-7_16
• Hofmann J., Fey D., Eitzinger J., Hager G., Wellein G.:
  Analysis of Intel's Haswell Microarchitecture Using the ECM Model and Microbenchmarks
  29th International Conference on Architecture of Computing Systems (Nuremberg)
  In: Architecture of Computing Systems -- ARCS 2016: 29th International Conference, Nuremberg, Germany, April 4-7, 2016, Proceedings, Cham: 2016
  DOI: 10.1007/978-3-319-30695-7_16
• Hofmann J., Fey D., Riedman M., Eitzinger J., Hager G., Wellein G.:
  Performance analysis of the Kahan-enhanced scalar product on current multi-corecore and many-core processors
  In: Concurrency and Computation-Practice & Experience 28 (2016)
  ISSN: 1532-0626
  DOI: 10.1002/cpe.3921
• Häublein K., Hartmann C., Reichenbach M., Fey D.:
  Fast and Resource Aware Image Processing Operators Utilizing Highly Configurable IP Blocks
  ARC 2016 - International Symposium on Applied Reconfigurable Computing (Mangaratiba, Brazil, 22. März 2016 - 24. März 2016)
  In: Applied Reconfigurable Computing, Mangaratiba: 2016
  DOI: 10.1007/978-3-319-30481-6
• Häublein K., Reichenbach M., Reiche O., Özkan MA., Fey D., Hannig F., Teich J.:
  Hybrid Code Description for Developing Fast and Resource Efficient Image Processing Architectures
  16th International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation (SAMOS) (Island of Samos, 18. Juni 2016 - 21. Juni 2016)
  In: Proceedings of the 16th International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation (SAMOS) 2016
  DOI: 10.1109/SAMOS.2016.7818350
• Kleinert B., Schäfer F., Weiß S., Bakakeu Ngassam RJ., Fey D.:
  Hardware-Software Co-Simulation of Self-Organizing Smart Home Networks: Who am I and where are the others?
• Kleinert B., Weiß S., Schäfer F., Bakakeu Ngassam RJ., Fey D.:
  Adaptive Synchronization Interface for Hardware-Software Co-Simulation based on SystemC and QEMU
  Simutools: 9th EAI International Conference on Simulation Tools and Techniques
• Kohl J., Demel C., Reichenbach M., Fey D.:
  A SystemC Based Framework for Cycle Accurate Processor Simulation and Parameter Analysis
  14th IFAC and IEEE Conference on Programmable Devices and Embedded Systems PDES 2015 (Brno/Lednice)
  In: 14th IFAC and IEEE Conference on Programmable Devices and Embedded Systems PDES 2015, Brno: 2016
  DOI: 10.1016/j.ifacol.2016.12.016
• Lieske T., Reichenbach M., Ringlein B., Fey D.:
  Dataflow Optimization for Programmable Embedded Image Preprocessing Accelerators
  2016 International Conference on ReConFigurable Computing and FPGAs (ReConFig) (Cancun, Mexico, 30. November 2016 - 2. Dezember 2016)
  In: Proceedings of ReConFig' 16 2016
  DOI: 10.1109/ReConFig.2016.7857161
  URL: http://ieeexplore.ieee.org/document/7857161/
• Lieske T., Schuklin D., Hohnloser D., Reichenbach M., Pfundt B., Fey D., Weigel R.:
  Smart Sensor Framework: A Pressure Sensor for Smart Home Applications
  1. E|HOME-CENTER SYMPOSIUM (Nürnberg, 30. November 2016 - 1. Dezember 2016)
• Limmer S., Fey D.:
  Comparison of Common Parallel Architectures for the Execution of the Island Model and the Global Parallelization of Evolutionary Algorithms
  In: Concurrency and Computation-Practice & Experience (2016)
  ISSN: 1532-0626
  DOI: 10.1002/cpe.3797
• Limmer S., Fey D.:
  Investigation of Strategies for an Increasing Population Size in Multi-objective CMA-ES
  IEEE Congress of Evolutionary Computation 2016 (Vancouver)
  In: IEEE Congress of Evolutionary Computation 2016 Proceedings 2016
• Pfundt B., Reichenbach M., Hartmann C., Häublein K., Fey D.:
  Teaching Heterogeneous Computer Architectures Using Smart Camera Systems
  Workshop on Microelectronics Education (Southampton)
  In: Proceedings of the 11th Workshop on Microelectronics Education 2016
• Richter F., Fey D.:
  Cellular Neural Networks for FPGAs with OpenCL
  CNNA 2016; 15th International Workshop on Cellular Nanoscale Networks and their Applications (23-25 Aug. 2016)
  In: CNNA 2016; 15th International Workshop on Cellular Nanoscale Networks and their Applications, Berlin, Offenbach: 2016
  URL: http://ieeexplore.ieee.org/document/7827967/
• Richter F., Fey D., Hain S.:
  FPGA-aware Transformations of LLVM-IR
  The First International Conference on Advances in Signal, Image and Video Processing (Lisbon, 26. Juni 2016 - 30. Juni 2016)
  In: The First International Conference on Advances in Signal, Image and Video Processing 2016
  Open Access: http://thinkmind.org/index.php?view=article&articleid=signal_2016_1_40_80070
• Richter-Gottfried F., Kreutzer P., Ditter A., Schneider M., Fey D.:
  C++ Classes and Templates for OpenCL Kernels with PATOS
  4th International Workshop on OpenCL (Wien, 19. April 2016 - 21. April 2016)
  In: ACM (Hrsg.): Proceedings of the 4th International Workshop on OpenCL, New York, NY, USA: 2016
  DOI: 10.1145/2909437.2909462
  URL: http://dl.acm.org/citation.cfm?doid=2909437.2909462
• Schäfer F., Bakakeu Ngassam RJ., Kleinert B., Michl M., Fey D., Franke J.:
  Designing an OPC UA based Ecosystem for Smarter Homes
  Advanced Engineering Forum 19 (Nürnberg)
  In: Advanced Engineering Forum 19 2016
• Schönwetter D., Ditter A., Aizinger V., Reuter B., Fey D.:
  Cache Aware Instruction Accurate Simulation of a 3-D Coastal Ocean Model on Low Power Hardware
  6th International Conference on Simulation and Modeling Methodologies, Technologies and Applications (Lisbon)
  DOI: 10.5220/0006006501290137
  (Conference report)
• Schönwetter D., Ditter A., Fey D., Mader R.:
  Improving instruction accurate simulation for parallel automotive applications
  11th IEEE International Symposium on Industrial Embedded Systems, SIES 2016 ([], 23. Mai 2016 - 25. Mai 2016)
  In: 11th IEEE Symposium on Industrial Embedded Systems, SIES 2016, Krakow, Poland, May 23-25, 2016 2016
  DOI: 10.1109/SIES.2016.7509432
• Schönwetter D., Ditter A., Kleinert B., Hendricks A., Aizinger V., Fey D.:
  Virtualization Guided Tsunami and Storm Surge Simulations for Low Power Architectures
  DOI: 10.1007/978-3-319-31295-8_7
• Vaas S., Reichenbach M., Fey D.:
  An Application-Specific Instruction Set Processor for Power Quality Monitoring
  23th Reconfigurable Architectures Workshop (RAW) (Chicago, 23. Mai 2016 - 27. Mai 2016)
  In: Parallel and Distributed Processing Symposium Workshop (IPDPSW) 2016
  DOI: 10.1109/IPDPSW.2016.143
• Vaas S., Reichenbach M., Hofmann J., Stadelmayer T., Fey D.:
  Embedded Parallel Computing Accelerators for Smart Control Units of Frequency Converters
  12th Workshop on Parallel Systems and Algorithms (PASA) (Nuremberg, 4. April 2016 - 7. April 2016)
  In: ARCS 2016; 29th International Conference on Architecture of Computing Systems, Nuremberg, Germany: 2016
• Vaas S., Reichenbach M., Margull U., Fey D.:
  The R2-D2 Toolchain - Automated Porting of Safety-Critical Applications to FPGAs
  2016 International Conference on ReConFigurable Computing and FPGAs (Cancun, 30. November 2016 - 2. Dezember 2016)
  In: Proceedings of ReConFig' 16 2016
  DOI: 10.1109/ReConFig.2016.7857192
  URL: http://ieeexplore.ieee.org/document/7857192/

2015

• Bürner J., Ditter A., Fey D., Franke J.:
  SmartEco: An Integrated Solution from Load Balancing between the Grid and Consumers to Local Energy Efficiency
  8th International Conference on Utility and Cloud Computing (Limassol, 7. Dezember 2016 - 10. Dezember 2015)
  In: IEEE (Hrsg.): IEEE/ACM 8th International Conference on Utility and Cloud Computing (UCC) 2015
• Ditter A., Schaffert R., Fey D., Schön T., Gruber R.:
  Multi-GPU Based Evaluation and Analysis of Prehistoric Ice Cores Using OpenCL
  International Conference on Imaging Systems and Techniques (Macau, China, 16. September 2015 - 18. September 2015)
  In: IST 2015 Proceedings 2015
  DOI: 10.1109/IST.2015.7294561
• Fey Dietmar, Martschinke Jonathan:
  Architecture and simulation of a hybrid memristive multiplier network using redundant number representation
  2015 International Joint Conference on Neural Networks (Killarney, Ireland, 12. Juli 2015 - 17. Juli 2015)
  In: Neural Networks (IJCNN), 2015
  DOI: 10.1109/IJCNN.2015.7280789
• Fey D.:
  Ternary Arithmetic Pipeline Architectures using multi-bit Memristors
  FUTURE COMPUTING 2015 (Nice, France)
  In: FUTURE COMPUTING 2015, The Seventh International Conference on Future Computational Technologies and Applications 2015
• Hannig F., Fey D., Lokhmotov A. (Hrsg.):
  Proceedings of the DATE Friday Workshop on Heterogeneous Architectures and Design Methods for Embedded Image Systems (HIS 2015)
  2015
  Open Access: http://arxiv.org/abs/1502.07241
  URL: http://arxiv.org/abs/1502.07241
• Hartmann C., Reichenbach M., Fey D.:
  IPOL - A Domain Specific Language for Image Processing Applications
  International Symposium on Advances in Embedded Systems and Applications (Embedded) (Barcelona)
  In: Proceedings of the International Symposium on Advances in Embedded Systems and Applications (Embedded 2015) 2015
• Hartmann C., Yupatova A., Reichenbach M., Fey D., German R.:
  A Holistic Approach for Modeling and Synthesis of Image Processing Applications for Heterogeneous Computing Architectures
  HIS Workshop. Design, Automation & Test in Europe (DATE) (Grenoble)
  In: Proceedings of HIS Workshop. Design, Automation & Test in Europe (DATE) 2015
• Herglotz C., Seiler J., Kaup A., Hendricks A., Reichenbach M., Fey D.:
  Estimation of Non-functional Properties for Embedded Hardware with Application to Image Processing
  22nd Reconfigurable Architectures Workshop (RAW) on the 29th Annual International Parallel & Distributed Processing Symposium (IPDPS) (Hyderabad, 25. Mai 2015 - 29. Mai 2015)
  DOI: 10.1109/IPDPSW.2015.58
  URL: http://arxiv.org/abs/2203.01771
• Hofmann J., Eitzinger J., Fey D.:
  Execution-Cache-Memory Performance Model: Introduction and Validation
  (2015)
  URL: https://arxiv.org/abs/1509.03118
  (Techreport)
• Hofmann J., Fey D., Eitzinger J., Hager G., Wellein G.:
  Performance analysis of the Kahan-enhanced scalar product on current multicore processors
  the 11th International Conference on Parallel Processing and Applied Mathematics (Krakow, Poland)
  In: Accepted for PPAM 2015 2015
  URL: http://arxiv.org/abs/1505.02586
• Kleinert B., Reichenbach M., Fey D., Rahimi R.:
  Hardware-software co-simulation for medical X-ray control units
  Eighth EAI International Conference on Simulation Tools and Techniques (Athen)
  In: Proceedings of the Eighth EAI International Conference on Simulation Tools and Techniques, European Union Digital Library: 2015
  DOI: 10.4108/eai.24-8-2015.2261148
  URL: http://www.eudl.eu/doi/10.4108/eai.24-8-2015.2261148
• Limmer S., Ditter A., Fey D., Pruksch M., Braun C., Drescher F., Beißer-Dresel M.:
  Test@Cloud - A Platform for Test Execution in the Cloud
  Parallel -Algorithmen, -Rechnerstrukturen und -Systemsoftware (Potsdam)
  In: Parallel-Algorithmen und Rechnerstrukturen 2015
• Pfundt B., Reichenbach M., Fey D., Söll C.:
  Novel Image Processing Architecture for 3D Integrated Circuits
  Parallel -Algorithmen, -Rechnerstrukturen und -Systemsoftware (PARS) (Potsdam)
• Reiche O., Häublein K., Reichenbach M., Hannig F., Teich J., Fey D.:
  Automatic Optimization of Hardware Accelerators for Image Processing
  DATE Friday Workshop on Heterogeneous Architectures and Design Methods for Embedded Image Systems (HIS 2015) (Grenoble, 13. März 2015 - 13. März 2015)
  In: Proceedings of the DATE Friday Workshop on Heterogeneous Architectures and Design Methods for Embedded Image Systems (HIS 2015) 2015
  URL: http://arxiv.org/abs/1502.07448
• Reiche O., Häublein K., Reichenbach M., Schmid M., Hannig F., Teich J., Fey D.:
  Synthesis and Optimization of Image Processing Accelerators using Domain Knowledge
  In: Journal of Systems Architecture 61 (2015), S. 646-658
  ISSN: 1383-7621
  DOI: 10.1016/j.sysarc.2015.09.004
  URL: https://www12.cs.fau.de/downloads/reiche/publications/RHRSHTF15.pdf
• Reichenbach M., Kasparek M., Alawieh M., Häublein K., Fey D.:
  Real-Time Correlation for Locating Systems Utilizing Heterogeneous Computing Architectures
  Conference on Design & Architectures for Signal & Image Processing (Cracow)
  In: Proceedings of the 2015 Conference on Design & Architectures for Signal & Image Processing 2015
• Reichenbach M., Lieske T., Vaas S., Häublein K., Fey D.:
  FAUPU - A Design Framework for the Development of Programmable Image Processing Architectures
  2015 International Conference on ReConFigurable Computing and FPGAs (Mayan Riveria, Mexico)
  In: Proceedings of ReConFig' 15 2015
  DOI: 10.1109/ReConFig.2015.7393309
• Reichenbach M., Pfundt B., Fey D.:
  Framework for Parameter Analysis of FPGA-based Image Processing Architectures
  International Conference on Systems, Architectures, MOdeling and Simulation (SAMOS) (Samos)
  In: Proceedings of International Conference on Systems, Architectures, MOdeling and Simulation (SAMOS) 2015
• Richter F., Ditter A., Fey D.:
  OpenCL 2.0 for FPGAs using OCLAcc
  Second International Workshop on FPGAs for Software Programmers (FSP 2015) (London)
  In: Proceedings of the Second International Workshop on FPGAs for Software Programmers (FSP 2015) 2015
  URL: http://arxiv.org/abs/1508.07977
• Schönwetter D., Ditter A., Kleinert B., Hendricks A., Aizinger V., Köstler H., Fey D.:
  Tsunami and Storm Surge Simulation Using Low Power Architectures - Concept and Evaluation
  5th International Conference on Simulation and Modeling Methodologies, Technologies and Applications (Colmar, 21. Juli 2015 - 23. Juli 2015)
  In: Proceedings of the 5th International Conference on Simulation and Modeling Methodologies, Technologies and Applications, Colmar, Alsace, France: 2015
  DOI: 10.5220/0005566603770382
• Schönwetter D., Veldema R., Fey D.:
  FREACSIM - A Framework for Creating and Simulating Real-Time Capable Network on Chip Systems and Applications
  8th EAI International Conference on Simulation Tools and Techniques (SIMUTOOLS'16) (Athens, Greece, 24. August 2015 - 26. August 2015)
  In: Theodoropoulos, Georgios ; Tan Soon Huat, Gary ; Szabo, Claudia (Hrsg.): Proceedings of the 8th EAI International Conference on Simulation Tools and Techniques (SIMUTOOLS'16), European Union Digital Library: 2015
  DOI: 10.4108/eai.24-8-2015.2260960
  URL: http://eudl.eu/doi/10.4108/eai.24-8-2015.2260960

2014

• Berschneider S., Herglotz C., Reichenbach M., Fey D., Kaup A.:
  Estimating Video Decoding Energies And Processing Times Utilizing Virtual Hardware
  3PMCES Workshop. Design, Automation & Test in Europe (DATE) (Dresden, 24. März 2014 - 28. März 2014)
• Brossog M., Hartmann C., Kohl J., Merhof J., Reichenbach M., Fey D., Franke J.:
  Prozessflexible Steuerung von Industrierobotern
  In: wt Werkstattstechnik - Online 104 (2014), S. 535-540
  ISSN: 1436-4980
• Ditter A., Fey D.:
  Security Aspects of Cloud Computing - Trusted Cloud in Cloud4E
  ITI Symposium (Dresden)
  In: Conference Proceedings of the 17th ITI Symposium 2014
• Ditter A., Fey D., Schön T., Steven O.:
  On the Way to Big Data Applications in Industrial Computed Tomography
  3rd International Congress on Big Data (Anchorage, 27. Juni 2014 - 2. Juli 2014)
  In: Proceedings of BigData Congress 2014, Los Alamitos, CA, USA: 2014
  DOI: 10.1109/BigData.Congress.2014.125
• Fey D.:
  Using the multi-bit feature of memristors for register files in signed-digit arithmetic units
  In: Semiconductor Science and Technology vol. 29 (2014), S. 104008 (13 pp)
  ISSN: 0268-1242
  DOI: 10.1088/0268-1242/29/10/104008
• Kaiser Hartmut, Heller Thomas, Adelstein-Lelbach Bryce, Serio Adrian, Fey Dietmar:
  HPX: A Task Based Programming Model in a Global Address Space
  8th International Conference on Partitioned Global Address Space Programming Models (Eugene, OR, USA)
  In: Proceedings of the 8th International Conference on Partitioned Global Address Space Programming Models, New York, NY, USA: 2014
  DOI: 10.1145/2676870.2676883
  URL: http://doi.acm.org/10.1145/2676870.2676883
• Häublein K., Reichenbach M., Fey D.:
  Fast and Generic Hardware Architecture for Stereo Block Matching Applications on Embedded Systems
  2014 International Conference on ReConFigurable Computing and FPGAs (Cancun, Mexico, 8. Dezember 2014 - 10. Dezember 2014)
  In: Proceedings of ReConFig' 14 2014
  DOI: 10.1109/ReConFig.2014.7032518
• Kuzmin Anton, Fey Dietmar, Lohmann Ulrich:
  Optical Link Testing and Parameters Tuning with a Test System Fully Integrated into FPGA
  In: International Journal on Advances in Systems and Measurements 7 (2014), S. 141-149
  ISSN: 1942-261x
  URL: http://www.iariajournals.org/systems_and_measurements/tocv7n12.html
• Limmer Steffen, Srba Maik, Fey Dietmar:
  Performance Investigation and Tuning in the Interoperable Cloud4E Platform
  Federative and Interoperable Cloud Infrastructures (FedICI) (Porto, Portugal, 25. August 2014 - 26. August 2014)
  In: Euro-Par 2014 Workshop, Part II, Cham: 2014
• Reichenbach M., Pfundt B., Fey D.:
  Designing and Manufacturing of Real Embedded Multi-Core CPUs: A Holistic Teaching Approach in Computer Architecture
  Workshop on Microelectronics Education (Tallin, Estonia, 14. Mai 2014 - 16. Mai 2014)
  In: Proceedings of the Tenth Workshop on Microelectronics Education 2014
  DOI: 10.1109/EWME.2014.6877428
• Richter F., Fey D.:
  OCLAcc: An Open-source Generator for Configurable Logic Block based Accelerators
  Embedded World Conference (Nuremberg)
  In: Embedded World Conference Proceedings, Haar: 2014
• Schneider Max, Fey Dietmar, Wenzel Kay, Machleidt Torsten:
  A Generic Approach for Analysis of White-Light Interferometry Data via User-Defined Algorithms.
  14th International Conference On Computational Science and Its Applications (Guimaraes, 30. Juni 2014 - 3. Juli 2014)
  In: Computational Science and Its Applications - ICCSA 2014, Portugal: 2014
  DOI: 10.1007/978-3-319-09147-1
  URL: http://www.springer.com/us/book/9783319091464
• Schäfer A., Heller T., Fey D.:
  A Portable Petascale Framework for Efficient Particle Methods with Custom Interactions
  EuroMPI/Asia 2014 (Kyoto)
  In: Proceedings of the EuroMPI/Asia 2014 2014

2013

• Ditter A., Fey D., Schön T., Luxa M., Gruber R.:
  The Impact of H.264/AVC on Compression and Non-Destructive Evaluation of Piston Data in Industrial Computed Tomography
  International Conference on Imaging Systems and Techniques (Peking, China, 22. Oktober 2013 - 23. Oktober 2013)
  In: IST 2013 Proceedings 2013
  DOI: 10.1109/IST.2013.6729699
• Ditter A., Limmer S., Fey D.:
  i3sched – Ein OpenNebula Scheduler für die Oracle Grid Engine
  Grid-, Cloud und Big-Data Technologien für Systementwurf und -analyse (Dresden)
  In: Grid-, Cloud und Big-Data Technologien für Systementwurf und -analyse 2013
• Ditter A., Limmer S., Fey D., Pruksch M.:
  Modellzentrierter Test in virtualisierten Testumgebungen
  April (2013), S. 3-4
  URL: http://www.cluster-ma.de/fileadmin/user_upload/bilder/newsletter2013/newsletter2013_04/mechatroniknews_april_2013.pdf
  (online publication)
• Ditter A., Pruksch M., Limmer S., Fey D.:
  Testen in der Cloud - Automatisiertes Testen in virtualisierten Umgebungen
  In: Elektrotechnik Juli/August (2013), S. 62-63
  ISSN: 1619-9405
  URL: http://files.vogel.de/vogelonline/vogelonline/issues/epaperarchiv/elektrotechnik_0713/index.html
• Heller Thomas, Fey Dietmar, Rehak Markus:
  An auto-tuning approach for optimizing base operators for non-destructive testing applications on heterogeneous multi-core architectures
  SORT 2013 (Paderborn)
  In: SORT 2013 2013
• Heller Thomas, Kaiser Hartmut, Schäfer Andreas, Fey Dietmar:
  Using HPX and LibGeoDecomp for Scaling HPC Applications on Heterogeneous Supercomputers
  Supercomputing 2013 (Denver, 17. November 2013 - 21. November 2013)
  In: ScalA'13 proceedings, Denver: 2013
  DOI: 10.1145/2530268.2530269.
• Hofmann J., Fey D.:
  Fast Evolutionary Algorithms: Comparing High Performance Capabilities of CPUs and GPUs
  Parallel-Algorithmen und Rechnerstrukturen (Erlangen)
  In: Mitteilungen - Gesellschaft für Informatik e.V. 2013
• Hofmann J., Limmer S., Fey D.:
  Performance Investigations of Genetic Algorithms on Graphics Cards
  In: Swarm and Evolutionary Computation (2013), S. 33-47
  ISSN: 2210-6502
  DOI: 10.1016/j.swevo.2013.04.003
  URL: http://www.sciencedirect.com/science/article/pii/S2210650213000187
• Limmer S., Fey D.:
  Porting of the transfer-matrix method for multilayer thin-film computations on graphics processing units
  In: Optical Engineering (2013)
  ISSN: 0091-3286
  DOI: 10.1117/1.OE.52.7.075103
• Limmer Steffen, Schneider André, Boehme Christian, Fey Dietmar, Schmitz Simon, Graupner Achim, Sülzle Martin:
  Services for numerical simulations and optimisations in grids
  In: International Journal of Parallel, Emergent and Distributed Systems (2013), S. 1-23
  ISSN: 1744-5760
  URL: http://www.tandfonline.com/doi/abs/10.1080/17445760.2013.842567
• Limmer Steffen, Schneider Andre, Boehme Christian, Fey Dietmar, Schmitz Simon, Graupner Achim, Sülzle Martin:
  Services for Numerical Simulations and Optimizations in Grids
  PDGC2012 (Waknaghat, India)
  In: Proceedings of 2012 2nd IEEE International Conference on Parallel, Distributed and Grid Computing (PDGC) 2013
  DOI: 10.1109/PDGC.2012.6449820
• Pfundt B., Reichenbach M., Eskofier B., Fey D.:
  Smart Sensor Architectures for Embedded Biosignal Analysis
  Design & Architectures for Signal & Image Processing (Cagliari, 8. Oktober 2013 - 10. Oktober 2013)
  In: Proceedings of the 2013 Conference on Design & Architectures for Signal & Image Processing, Cagliari, Italy: 2013
• Reichenbach M., Fey D.:
  Extending Heterogeneous Multi Core Processor Architectures for Embedded Wireless Applications
  European Microwave Conference 2013 (Nürnberg)
  In: Technologies for Embedded Wireless Systems 2013
• Reichenbach M., Seidler R., Pfundt B., Fey D.:
  Fast image processing for optical metrology utilizing heterogeneous computer architectures
  In: Computers & Electrical Engineering (2013)
  ISSN: 0045-7906
  DOI: 10.1016/j.compeleceng.2013.09.008
  URL: http://www.sciencedirect.com/science/article/pii/S0045790613002474
• Schäfer A., Reichenbach M., Fey D.:
  Continuous Integration and Automation for Devops
  In: IAENG Transactions on Engineering Technologies Special Edition of the World Congress on Engineering and Computer Science 2011, Dordrecht: Springer Verlag, 2013, S. 345-358 (Lecture Notes in Electrical Engineering, Bd.170 LNEE)
  ISBN: 9400747853
  DOI: 10.1007/978-94-007-4786-9_28
  URL: http://www.springerlink.com/content/n127023783207158/
• Schönwetter D., Sieh V., Fey D.:
  Porting an Engine Control Application to a Virtual Environment by using an Open Source Real Time Operating System
  Embedded World Conference (Nuremberg)
  In: Embedded World Conference Proceedings, Haar: 2013

2012

• Fey D., Kleinert B.:
  Using Symbolic Substitution Logic as an Automated Design Procedure for QCA Arithmetic Circuits
  Future Computing 2012 (Nizza)
  In: Proceedings FUTURE COMPUTING 2012 : The Fourth International Conference on Future Computational Technologies and Applications 2012
• Fey D., Reichenbach M., Komann M., Seidler R.:
  Realizing real-time centroid detection of multiple objects with marching pixels algorithms on programmable customizing hardware
  In: Concurrency and Computation-Practice & Experience 24 (2012), S. 1821-1839
  ISSN: 1532-0626
  DOI: 10.1002/cpe.1793
• Kuzmin A., Fey D.:
  Optical Link Testing and Parameters Tuning with a Test System Fully Integrated into FPGA
  The Fourth International Conference on Advances in System Testing and Validation Lifecycle (Lisbon, Portugal, 18. November 2012 - 23. November 2012)
  In: VALID 2012, The Fourth International Conference on Advances in System Testing and Validation Lifecycle, Lisbon, Portugal: 2012
  URL: http://www.thinkmind.org/download.php?articleid=valid_2012_5_20_40029
• Lohmann Ulrich, Jahns Jürgen, Limmer Steffen, Fey Dietmar, Bauer Hannes:
  Design of a Highly Parallel Board-Level-Interconnection with 320 Gbps Capacity
  SPIE (San Francisco, California, USA, 23. Januar 2012 - 25. Januar 2012)
  In: Proc. SPIE 8267 2012
  DOI: 10.1117/12.905888
• Limmer Steffen, Fey Dietmar, Lohmann Ulrich, Jahns Jürgen:
  Evolutionary Design of Active Free Space Optical Networks Based on Digital Mirror Devices
  Evostar (Malaga, 11. April 2012 - 13. April 2012)
  In: Applications of Evolutionary Computation, Berlin Heidelberg: 2012
  DOI: 10.1007/978-3-642-29178-4_3
• Jones Christopher, Helfert Stefan, Jahns Jürgen, Limmer Steffen, Fey Dietmar:
  Wave guiding properties of ribbed surface waveguides in three frequency domains
  In: Optical and Quantum Electronics (2012), S. 1-11
  ISSN: 0306-8919
  DOI: 10.1007/s11082-012-9619-3
• Limmer S., Fey D., Jahn J.:
  GPU implementation of a multiobjective search algorithm
  In: Positivity 16 (2012), S. 397-404
  ISSN: 1385-1292
  DOI: 10.1007/s11117-012-0156-x
• Reichenbach M., Schmidt M., Fey D., Nieszner T.:
  An Image Processing Pipeline for fast Spot Detection in Smart Camera Systems
  embedded world Conference 2012 (Nürnberg)
  In: proceedings of embedded world Conference 2012, Haar: 2012
• Reichenbach M., Seidler R., Fey D.:
  Heterogeneous Computer Architectures: An Image Processing Pipeline for Optical Metrology
  2012 International Conference on ReConFigurable Computing and FPGAs (Cancun, Mexico, 5. Dezember 2012 - 7. Dezember 2012)
  In: Proceedings of ReConFig' 12 2012
  DOI: 10.1109/ReConFig.2012.6416755
• Richter F., Schmidt M., Fey D.:
  A Configurable VHDL Template for Parallelization of 3D Stencil Codes on FPGAs
  ERSA'12 (Las Vegas)
  In: Proceedings of the International Conference on Engineering of Reconfigurable Systems and Algorithms, Las Vegas: 2012
• Schmidt M., Fey D.:
  Akers’s Wavefront Planner - One of the fastest Stencil-based Path Planners on FPGAs
  ReConFig 2012 (Cancun, Mexico, 5. Dezember 2012 - 7. Dezember 2012)
  In: Proceedings of the International Conference on ReConFigurable Computing and FPGAs 2012
  DOI: 10.1109/ReConFig.2012.6416727
• Schmidt M., Fey D., Reichenbach M.:
  Parallel Embedded Computing Architectures
  In: Embedded Systems - High Performance Systems, Applications and Projects, online: InTech - Open Access Company, 2012, S. 3-18
  ISBN: 978-953-51-0350-9
  URL: http://www.intechopen.com/books/embedded-systems-high-performance-systems-applications-and-projects
• Schmidt M., Reichenbach M., Fey D.:
  A Generic VHDL Template for 2D Stencil Code Applications on FPGAs
  Workshop of Self-Organizing Real-Time Systems (SORT) (Shenzen, China)
  In: Proceedings of the 15th IEEE International Symposium of Object/Component/Service-Oriented Real-Time Distributed Computing Workshops (ISORCW) 2012
  DOI: 10.1109/ISORCW.2012.39
• Schneider Max, Belic Nikola, Sambale Christoph , Hofmann Ulrich , Fey Dietmar:
  Optimization of a Short-Range Proximity Effect Correction Algorithm in E-Beam Lithography Using GPGPUs
  12th International Conference on Algorithms and Architectures for Parallel Processing (Fukuoka, Japan, 4. September 2012 - 7. September 2012)
  In: Algorithms and Architectures for Parallel Processing, Japan: 2012
  DOI: 10.1007/978-3-642-33078-0_4
  URL: http://link.springer.com/book/10.1007/978-3-642-33078-0/page/1
• Schäfer A., Fey D.:
  A Predictive Performance Model for Stencil Codes on Multicore CPUs
  The Seventh International Workshop on Automatic Performance Tuning (Kobe)
  In: The Seventh International Workshop on Automatic Performance Tuning 2012
• Schönwetter D., Schneider M., Fey D.:
  A Speed-Up Study for a Parallelized White Light Interferometry Preprocessing Algorithm on a Virtual Embedded Multiprocessor System
  10th Workshop on Parallel System and Algorithms (Munich, 28. Februar 2012 - 2. März 2012)
  In: ARCS 2012 Workshops, Bonn: 2012

2011

• Fey Dietmar, Komann Marcus:
  Emergent Computing with Marching Pixels for Real-Time Smart Camera Applications
  In: Organic Computing - A Paradigm Shift for Complex Systems, Basel: Springer, 2011, S. 559-572
  ISBN: 978-3-0348-0129-4
  DOI: 10.1007/978-3-0348-0130-0
  URL: http://www.springerlink.com/content/978-3-0348-0129-4/#section=889693&page=1&locus=0
• Limmer Steffen, Fey Dietmar, Lohmann Ulrich, Jahns Jürgen:
  Evolutionary Optimization of Layouts for High Density Free Space Optical Network Links
  Genetic and Evolutionary Computation Conference (GECCO) (Dublin, Ireland, 12. Juli 2011 - 16. Juli 2011)
  In: GECCO '11: Proceedings of the 13th annual conference companion on Genetic and evolutionary computation, New York, NY, USA: 2011
  DOI: 10.1145/2001576.2001797
• Limmer S., Fey D.:
  Service zum Start von Grid-Jobs in virtuellen Machinen
  Workshop Grid-Technologie für den Entwurf technischer Systeme (Grid4TS) (Dresden)
  In: 4. Workshop Grid-Technologie für den Entwurf technischer Systeme 2011
• Lohmann Ulrich, Jahns Jürgen, Limmer Steffen, Fey Dietmar:
  Simulation and Optimized Design of High Density Optical Crossconnect Systems for Massively Parallel Computing Architectures
  OSC (Bertinoro, Italy, 17. November 2010 - 19. November 2010)
  In: Proceedings of the Third International Conference on Optical Supercomputing, Berlin, Heidelberg: 2011
  DOI: 10.1007/978-3-642-22494-2_6
• Lohmann Ulrich, Jahns Jürgen, Limmer Steffen, Fey Dietmar:
  Three-Dimensional Crossbar Interconnection Using Planar-Integrated Free-Space Optics and Digital Mirror-Device
  Society of Photo-Optical Instrumentation Engineers (SPIE) (San Francisco, California, USA, 26. Januar 2011 - 27. Januar 2011)
  In: Optoelectronic Integrated Circuits XIII (Proceedings Volume) 2011
  DOI: 10.1117/12.876359
• Limmer S., Fey D., Jahn J.:
  GPU Implementation of a Multiobjective Search Algorithm
  CS-2011-03 (2011), S. 7
  URL: http://www.opus.ub.uni-erlangen.de/opus/volltexte/2011/2538/
  (Techreport)
• Reichenbach M., Fey D., Loos A.:
  ASIC Architecture to Determine Object Centroids from Gray-Scale Images Using Marching Pixels
  International Conferences, WiMoA 2011 and ICCSEA 2011 (Dubai, 25. Mai 2011 - 27. Mai 2011)
  In: Advances in Wireless, Mobile Networks and Applications, Heidelberg: 2011
  DOI: 10.1007/978-3-642-21153-9_22
• Reichenbach M., Schmidt M., Fey D.:
  Analytical Model for the Optimization of Self-Organizing Image Processing Systems Utilizing Cellular Automata
  14th IEEE International Symposium (Newport Beach, 28. März 2011 - 31. März 2011)
  In: Object/Component/Service-Oriented Real-Time Distributed Computing Workshops (ISORCW) 2011
  DOI: 10.1109/ISORCW.2011.25
• Reichenbach M., Schmidt M., Pfundt B., Fey D.:
  A New Virtual Hardware Laboratory for Remote FPGA Experiments on Real Hardware
  EEE 2011 (Las Vegas)
  In: Proceedings of the 2011 International Conference on E-Learning, E-Business, Enterprise Information Systems, &E-Goverment, Las Vegas: 2011
• Reichenbach M., Seidler R., Fey D., Pfundt B.:
  Generic Emergent Computing in Chip Architectures
  In: Organic Computing - A Paradigm Shift for Complex Systems, Basel: Springer, 2011, S. 179-192
  ISBN: 978-3-0348-0129-4
  DOI: 10.1007/978-3-0348-0130-0
  URL: http://www.springerlink.com/content/978-3-0348-0129-4/#section=889693&page=1&locus=0
• Schmidt M., Reichenbach M., Fey D., Loos A.:
  A Smart Camera Processing Pipeline for Image Applications Utilizing Marching Pixels
  In: Signal & Image Processing Vol. 2 (2011), S. 137-156
  ISSN: 2229-3922
• Schneider Max, Fey Dietmar, Kapusi Daniel, Machleidt Torsten:
  Performance comparison of designated preprocessing white light interferometry algorithms on emerging multi- and many-core architectures
  In: Procedia Computer Science, Nanyang Technological University, Singapore: Elsevir, 2011, S. 2037-2046 (Proceedings of the International Conference on Computational Science, ICCS 2011, Bd.4)
  DOI: 10.1016/j.procs.2011.04.222
  URL: http://www.sciencedirect.com/science?_ob=MiamiImageURL&_cid=280203&_user=616145&_pii=S1877050911002808&_check=y&_origin=&_coverDate=31-Dec-2011&view=c&wchp=dGLbVlS-zSkzS&md5=4fd82d38ee92c68aa41528f3d4348625/1-s2.0-S1877050911002808-main.pdf
• Schäfer A., Fey D.:
  High Performance Stencil Code Algorithms for GPGPUs
  ICCS 2011 (Nanyang Technological University, Singapur, 1. Juni 2011 - 3. Juni 2011)
  In: Proceedings of the International Conference on Computational Science 2011
  DOI: 10.1016/j.procs.2011.04.221
  URL: http://www.libgeodecomp.org/archive/iccs2011_high_performance_stencil_code_algorithms_for_gpgpus.pdf
• Schäfer A., Fey D., Hammer J.:
  Parallel simulation of dendritic growth on unstructured grids
  SC'11 SC Conference on High Performance Computing Networking, Storage and Analysis Seattle (Seattle, 13. November 2011 - 13. November 2011)
  In: IAAA '11: Proceedings of the first workshop on Irregular applications: architectures and algorithms, New York, NY, USA: 2011
  DOI: 10.1145/2089142.2089148
  URL: http://dl.acm.org/citation.cfm?id=2089148
• Schäfer A., Reichenbach M., Fey D.:
  Collaborative Administration in the Context of Research Computing Systems
  WCECS 2011 (Berkeley, CA, USA)
  In: World Congress on Engineering and Computer Science 2011, San Francisco: 2011
• Seidler R., Schmidt M., Schäfer A., Fey D.:
  Efficient Implementation of Selected Parallel Path Planning Algorithms on GPUs
  In: Journal on Computing, Singpur: Global Science and Technology Forum (GSTF), 2011, S. 107-112 (GSTF International Journal on Computing (JoC), Bd.1)
• Seidler R., Schäfer A., Fey D.:
  Fast Dot Correlation in Optical Metrology on GPGPUs
  PDPTA 2011 (Las Vegas)
  In: Proceedings of The 2011 International Conference on Parallel and Distributed Processing Technology and Applications, Las Vegas: 2011

2010

• Fey D. (Hrsg.):
  Grid-Computing - Eine Basistechnologie für Computational Science
  Heidelberg: 2010
  ISBN: 978-3-5407-9746-3
• Fey D.:
  Grid Computing für Computational Science
  In: Grid-Computing - Eine Basistechnologie für Computational Science, Heidelberg: Springer, 2010, S. 3-13
  ISBN: 978-3-5407-9746-3
• Fey D.:
  Leistungsmaße für das parallele Rechnen
  In: Grid-Computing - Eine Basistechnologie für Computational Science, Heidelberg: Springer, 2010, S. 39-49
  ISBN: 978-3-5407-9746-3
• Fey D.:
  Marching Pixels - Rechnen mit Hardware-Agenten im 2D Pixelraum
  GI Jahrestagung 2010 (Leipzig)
  In: GI Jahrestagung 2010 2010
• Fey D.:
  Parallelisierungstechniken
  In: Grid-Computing - Eine Basistechnologie für Computational Science, Heidelberg: Springer, 2010, S. 51-97
  ISBN: 978-3-5407-9746-3
• Fey D.:
  Rechnender Raum und seine Bedeutung für Unkonventionelle Architekturen und Rechenmethoden
  VDE-Kongress 2010 - E-Mobility: Technologien - Infrastruktur - Märkte (Leipzig)
  In: VDE-Kongress 2010 - E-Mobility 2010
• Komann Markus, Fey Dietmar:
  Revising the Trade-off between the Number of Agents and Agent Intelligence
  EVOApplications 2010 (Istanbul, 7. April 2010 - 9. April 2010)
  In: EVOApplications 2010 2010
  DOI: 10.1007/978-3-642-12239-2-4
• Fey D., Reichenbach M., Seidler R., Komann M.:
  Realizing Real-Time Centroid Detection of Multiple Objects with Marching Pixels Algorithms
  13th IEEE International Symposium on Object/Component/Service-Oriented Real-Time Distributed Computing Workshops (Carmona, Spanien, 4. Mai 2010 - 7. Mai 2010)
  In: Proc. of the 13th IEEE International Symposium on Object/Component/Service-Oriented Real-Time Distributed Computing Workshops 2010
  DOI: 10.1109/ISORCW.2010.26
• Limmer S., Fey D.:
  Framework for Distributed Evolutionary Algorithms in Computational Grids
  5th International Symposium on Advances in Computation and Intelligence (Wuhan, China, 22. Oktober 2010 - 24. Oktober 2010)
  In: Advances in Computation and Intelligence, Berlin / Heidelberg: 2010
  DOI: 10.1007/978-3-642-16493-4_18
• Reichenbach M., Seidler R., Fey D., Pfundt B.:
  Design of a Programmable Architecture for Cellular Automata Based Image Processing for Smart Camera Chips
  Annual International Conference on Advances in Distributed and Parallel Computing (ADPC 2010) (Singapur)
  In: Proc. of the Annual International Conference on Advances in Distributed and Parallel Computing (ADPC 2010) 2010
• Sand M., Sieh V., Fey D.:
  Nano-technology aware investigations on fault-masking techniques in the presence of high fault probabilities
  2010 International Conference on High Performance Computing and Simulation (HPCS) (Caen, France, 28. Juni 2010 - 2. Juli 2010)
  In: Proceedings of the 2010 International Conference on High Performance Computing and Simulation (HPCS) 2010
  DOI: 10.1109/HPCS.2010.5547139
• Schmidt M., Fey D.:
  An Optimized FPGA Implementation for a Parallel Path Planning Algorithm Based on Marching Pixels
  Conference on Reconfigurable Computing and FPGAs (ReConFig) (Cancun, Mexico, 13. Dezember 2010 - 15. Dezember 2010)
  In: Proceedings of the 6th International Conference on Reconfigurable Computing and FPGAs, IEEE, CS Digital Library: 2010
  DOI: 10.1109/ReConFig.2010.18
• Loos Andreas, Schmidt Michael, Fey Dietmar, Gröbel Jens:
  Dynamically programmable image processor for compact vision systems
  Computer and Information Technology (CIT) (Bradford, UK, 29. Juni 2010 - 1. Juli 2010)
  In: Proceedings of the 10th IEEE Conference on Computer and Information Technology, IEEE, CS Digital Library: 2010
  DOI: 10.1109/CIT.2010.50
• Schäfer A., Fey D.:
  Tool for Automated Generation of MPI Typemaps
  International Conference on High Performance Computing Systems (HPCS-10) (Orlando, FL, USA)
  In: International Conference on High Performance Computing Systems (HPCS-10), Orlando: 2010
  URL: http://www3.informatik.uni-erlangen.de/Persons/schaefer/hpcs10_tool_for_automated_generation_of_typemaps.pdf
• Seidler R., Schmidt M., Schäfer A., Fey D.:
  Comparison of Selected Parallel Path Planning Algorithms on GPGPUs and Multi-Core
  Annual International Conference on Advances in Distributed and Parallel Computing (ADPC 2010) (Singapur)
  In: Proc. of the Annual International Conference on Advances in Distributed and Parallel Computing (ADPC 2010), Singapur: 2010

2009

• Fey D.:
  Model-Driven Design and Organic Computing - Two Different but Possibly Accordable Concepts for the Design of Embedded Systems
  (ISORC 2009) (Tokio, Japan, 17. März 2009 - 20. März 2009)
  In: 12 th IEEE Intern. Symposium on Object/component/service-oriented Real-time distributed Computing 2009
  DOI: 10.1109/ISORC.2009.24
• Fey D., Reichenbach M., Fekete S., Komann M., Kröller A., Schmidt C.:
  Distributed vision with smart pixels
  25th Annual ACM Symposium on Computational Geometry (Aarhus, Denmark, 8. Juni 2009 - 10. Juni 2009)
  In: Proc. of the 25th Annual ACM Symposium on Computational Geometry 2009
  DOI: 10.1145/1542362.1542410
• Schneider Max, Fey Dietmar, Beier Tobias, Fischer Peter, Müller Andreas:
  Effiziente Nutzung der Cell BE Architektur für Anwendungen aus der optischen Messtechnik
  . (Helmut-Schmidt-Universität, Hamburg)
  In: 1. Workshop Innovative Rechnertechnologien, Nanotechnologien für die IT 2009

2008

• Komann Marcus, Fey Dietmar, Kröller Alexander, Schmidt Christian, Fekete Sandor P.:
  Emergent algorithms for centroid and orientation detection in high-performance embedded cameras
  Computing Frontiers 2008 (Ischia, Italy, 5. Mai 2008 - 7. Mai 2008)
  In: Proc. of ACM Intern. Conf. on Computing Frontieres 2008
  DOI: 10.1145/1366230.1366271
• Fey Dietmar, Gaede Carsten, Loos Andreas, Komann Marcus:
  A new marching pixels algorithm for application-specific vision chips for fast detection of objects' centroids
  (PDCS 2008) (Orlando, Florida, USA, 16. November 2008 - 18. November 2008)
  In: Intern. Conf. on Parallel and Distributed Computing and Systems 2008
• Loos A., Fey D.:
  A 2000 frames/s programmable binary image processor chip for real-time machine vision applications
  (RTAS'08) (St. Louis, MO, United States)
  In: Proc. Work-in-Progress Session 14th IEEE Real-Time and Embedded Technology and Application Symposium 2008
• Loos Andreas, Schmidt Michael, Fey Dietmar, Gröbel Jens:
  High speed binary image processor for compact real time vision systems
  (DASIP 2008) (Bruxelles, Belgium)
  In: Proc. Conf. on Design and Architectures for Signal and Image Processing 2008
• Schmidt M., Fey D.:
  A Parallel Path Planning Approach Based on Organic Computing Principles
  (IASTED) (Orlando, USA, 16. November 2008 - 18. November 2008)
  In: Proc. of the 20th IASTED Intern. Conf. on Parallel and Distributed Computing and Systems 2008
• Erdmann Jakob, Schäfer Andreas, Kauhaus Andreas, Fey Dietmar:
  A profitability heuristic that reduces the parameter dependence of dynamic load balancing
  In: Informatiktage 2008 Fachwissenschaftlicher Informatik-Kongress, Bonn/Berlin: Köllen, 2008, S. 217-219 (GI-Edition. Seminar 6, Bd.LNI)
  ISBN: 978-3-88579-440-0
• Schäfer A., Fey D.:
  LibGeoDecomp: A Grid-enabled Library for Geometric Decomposition Codes
  15th European PVM/MPI Users Group Meeting (Dublin, 7. September 2008 - 10. September 2008)
  In: Lecture Notes in Computer Science: Recent Advances in Parallel Virtual Machine and Message Passing Interface, Berlin: 2008
  DOI: 10.1007/978-3-540-87475-1_39
  URL: http://www.springerlink.com/content/529218573872k252/fulltext.pdf
• Schäfer A., Fey D.:
  Pollarder: An architecture concept for self-adapting parallel applications in computational science
  In: Computational Science - ICCS 2008, Berlin, Heidelberg: Springer-verlag, 2008, S. 174-183 (Computational Science - ICCS 2008, Bd.LNCS)
  ISBN: 978-3-540-69383-3
  DOI: 10.1007/978-3-540-69384-0_23
  URL: http://www.springerlink.com/index/eh05361h450n13m8.pdf

2007

• Fey Dietmar, Komann Marcus:
  A bio-inspired architecture approach for a one-billion transistor smart CMOS camera chip
  Bioengineered and Bioinspired Systems III (Maspalomas, Gran Canaria, Spain, 2. Mai 2007 - 4. Mai 2007)
  In: Proc. of SPIE Vol. 6592 2007
  DOI: 10.1117/12.722074
• Schnerring Wolfgang, Kauhaus Christian, Fey Dietmar:
  A virtual test environment for mpi development: Quick answers to many small questions
  In: 14th European PVM/MPI User's Group Meeting, Berlin, Heidelberg: Springer-verlag, 2007, S. 73-80 (Recent Advances in Parallel Virtual Machine and Message Passing Interface, Bd.LNCS)
  ISBN: 9783540754152
• Komann Marcus, Mainka Andreas, Fey Dietmar:
  Comparison of envolving uniform, nonuniform cellular automaton, and genetic programming for centroid detection with hardware agents
  In: 9th International Conference, PaCT 2007, Berlin, Heidelberg: Springer Verlag, 2007, S. 432-441 (Parallel Computing Technologies, Bd.LNCS)
• Fey Dietmar, Komann Marcus, Schurz Frank, Loos Andreas:
  An organic computing architecture for visual microprocessors based on marching pixels
  (ISCAS 2007) (New Orleans, Louisiana, USA, 27. Mai 2007 - 30. Mai 2007)
  In: International Symposium on Circuits and Systems 2007
• Schäfer Andreas, Erdmann Jakob, Fey Dietmar:
  Simulation of Dendritic Growth for Materials Science in Multi-Cluster Environments
  Workshop Grid-Technologie für den Entwurf technischer Systeme (Grid4TS), (Dresden)
  In: Workshop Grid-Technologie für den Entwurf technischer Systeme (Grid4TS) 2007

2006

• Komann Marcus, Fey Dietmar:
  A toolbox for different organic computing algorithms for marching pixels
  (2006)
  (Techreport)
• Kauhaus Christian, Fey Dietmar:
  Building mini-grid environments with virtual private networks: A pragmatic approach
  (PARELEC 2006) (Bialystok, Poland)
  In: 5th Intern. Conf. on Parallel Computing in Electrical Engineering 2006
• Komann Marcus, Fey Dietmar:
  Marching pixels: Using organic computing principles in embedded parallel hardware
  (PARELEC 2006) (Bialystok, Poland, 13. September 2006 - 17. September 2006)
  In: 5th Intern. Conf. on Parallel Computing in Electrical Engineering 2006
  DOI: 10.1109/PARELEC.2006.52
• Schurz Frank, Fey Dietmar, Berkov Dimitri:
  Parallelization of simulations for various magnetic system models on small-sized cluster computers with mip
  In: ICCSA 2006, International Conference, Proceedings, Part IV, Berlin, Heidelberg: Springer Verlag, 2006, S. 129-138 (Computational Science and Its Applications, Bd.LNCS)
  ISBN: 3-540-34077-7
• Beckstein Clemens, Dittrich Peter, Erfurth Christian, Fey Dietmar, König-Ries Birgitta, Mundhenk Martin, Sack Harald:
  Sogos - a distributed meta level architecture for the self-organizing grid of services
  (MDM 2006) (Nara, Japan, 10. Mai 2006 - 12. Mai 2006)
  In: 7th Intern. Conf. on Mobile Data Management 2006
  DOI: 10.1109/MDM.2006.146
• Loos Andreas, Schmidt Michael, Graupner Achim, Fey Dietmar, Schüffny Rene:
  A combined space-time multiplex architecture for a stacked smart sensor chip
  Micro-Optics, VCSELs, and Photonic Interconnects II: Fabrication, Packaging, and Integration (Strasbourg, France, 3. April 2006 - 5. April 2006)
  In: Proc. SPIE, Vol. 6185 / Computer Architectures and Photonic Interconnects 2006
  DOI: 10.1117/12.662287
• Schmidt M., Loos A., Fey D.:
  A Space-Time Multiplex Architecture for 3D Stacked Embedded Vision Systems
  (PARELEC) (Bialystok, Poland, 13. September 2006 - 17. September 2006)
  In: Proc. of the 5th Intern. Symposium on Parallel Computing in Electrical Enineering 2006
  DOI: 10.1109/PARELEC.2006.10

2005

• Fey Dietmar, Schmidt Daniel:
  A new organic computing principle for smart cmos camera chips
  In: Architecture of Computing Systems 2005 (ARCS '05), Berlin/Offenbach: VDE Verlag GmbH, 2005, S. 123-130
  ISBN: 3-8007-2880-X
• Brinkschulte Uwe, Becker Jürgen, Fey Dietmar, Hochberger Christian, Martinetz Thomas, Müller-Schloer Christian, Ungerer Theo, Würtz Rolf P. (Hrsg.):
  Architecture of Computing Systems 2005 (ARCS '05)
  Berlin/Offenbach: 2005
  ISBN: 3-8007-2880-X
• Fey Dietmar, Schmidt Daniel:
  Marching pixels: A new organic computer paradigm for smart sensor processor arrays
  2nd Conference on Computing Frontiers (Ischia, Italy)
  In: Proc. of the 2nd Conference on Computing Frontiers 2005
• Hoppe Lutz, Förtsch Michael, Loos Andreas, Fey Dietmar, Zimmermann Horst:
  A parallel analogue-digital photodiode array processor chip with hard-wired morphologic algorithms
  Detectors and Associated Signal Processing II (Jena, Germany, 13. September 2005 - 14. September 2005)
  In: Proc. SPIE, Vol. 5964 2005
  DOI: 10.1117/12.625074
• Loos Andreas, Fey Dietmar, Graupner Achim, Schüffny Rene:
  Architektur und Realisierung parallelmorphologischer Algorithmen in einem CMOS-Bildsensor
  8. Workshop Optik in der Rechentechnik (Ilmenau, Germany)
  In: Tagungsband 8. Workshop Optik in der Rechentechnik 2005
• Kauhaus Christian, Schäfer Andreas, Fey Dietmar:
  Harpy: A Virtual Machine Based Approach to High-Throughput Cluster Computing
  (2005)
  URL: http://www2.informatik.uni-jena.de/~ckauhaus/2005/harpy.pdf
  (Techreport)
• Schäfer A., Fey D.:
  Harpy - Employing a Process Migration Facility and a User Mode Linux for High Throughput Computing
  GI Informatiktage 2005 (Bonn)
  In: Informatiktage 2005: Fachwissenschaftlicher Informatik-Kongress, Bonn: 2005
  URL: http://www.amazon.de/exec/obidos/ASIN/3885794365

1998

• Fey Dietmar, Kasche B., Burkert Ch., Tschaeche O.:
  Specification for a reconfigurable optoelectronic VLSI processor suitable for digital signal processing
  In: Applied Optics (1998), S. 284-295
  ISSN: 0003-6935
  URL: http://www3.informatik.uni-erlangen.de/Publications/Articles/tschaeche_ao.pdf