Johannes Knödtel, M. Sc.
2019
Simulating memristive systems in mixed-signal mode using commercial design tools
26th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2019 (Genoa, 27. November 2019 - 29. November 2019)
In: 2019 26th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2019 2019
DOI: 10.1109/ICECS46596.2019.8964856
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Optimizing Multi-State Reliability in ReRAM Arrays using an Automated Device Selection Method
MEMRISYS 2019 International Conference on Memristive Materials, Devices & Systems (International Congress Center Dresden, 8. Juli 2019 - 11. Juli 2019)
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2018
A Novel Methodology for Evaluating the Energy Consumption of IP Blocks in System-Level Designs
28th International Symposium on Power and Timing Modeling, Optimization and Simulation (Platja D’Aro, 2. Juli 2018 - 4. Juli 2018)
In: 2018 28th International Symposium on Power and Timing Modeling, Optimization and Simulation (PATMOS) 2018
DOI: 10.1109/PATMOS.2018.8464149
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A programmable ternary CPU using hybrid CMOS/memristor circuits
In: International Journal of Parallel, Emergent and Distributed Systems (2018), S. 1--21
ISSN: 1744-5760
DOI: 10.1080/17445760.2017.1422251
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2017
Prototyping Memristors in Digital Systems with an FPGA-Based Testing Environment
International Symposium on Power and Timing Modeling, Optimization and Simulation (Thessaloniki, 25. September 2017 - 27. September 2017)
In: Power and Timing Modeling, Optimization and Simulation (PATMOS), 2017 27th International Symposium on 2017
DOI: 10.1109/PATMOS.2017.8106978
URL: http://ieeexplore.ieee.org/document/8106978/
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