Wolfgang Bauer

Wolfgang Bauer, M. Eng.

Department Informatik (INF)
Lehrstuhl für Informatik 3 (Rechnerarchitektur)

E-Mail: wolfgangm.bauer@fau.de
Webseite: https://www.cs3.tf.fau.de/person/wolfgang-bauer/

Information

Since February 2017, Wolfgang Bauer is a member of the research staff at the Chair of Computer Architecture. He holds a Master’s Degree (M.Eng.) in Electrical and Mechatronic Systems.

Research Interests

Hardware-near Simulation
Constraint Random Verification

Publications

2019

Bauer W., Holzinger P., Rachuj S., Häublein K., Reichenbach M., Fey D.:
Evaluating HSA-Compatible Heterogeneous Systems for ADAS Applications
ARCS 2019: 32nd International Conference on Architecture of Computing Systems (Copenhagen, Denmark, 20. Mai 2019 - 24. Mai 2019)
In: Trinitis, Carsten; Pionteck, Thilo (Hrsg.): Workshop Proceedings 2019
Bauer W., Holzinger P., Reichenbach M., Vaas S., Hartke P., Fey D.:
Programmable HSA Accelerators for Zynq UltraScale+ MPSoC Systems
Euro-Par 2018: Parallel Processing Workshops - Euro-Par 2018 International Workshops
In: Mencagli G, B. Heras D, Cardellini V, Casalicchio E, Jeannot E, Wolf F, Salis A, Schifanella C, Manumachu RR, Ricci L, Beccuti M, Antonelli L, Garcia Sanchez JD, Scott SL (Hrsg.): Euro-Par 2018: Parallel Processing Workshops, Cham: 2019
DOI: 10.1007/978-3-030-10549-5_57

2018

Rachuj S., Bauer W., Fey D.:
Evaluation of a Sensor Fusion Algorithm on a Real-Time Processor
AmE 2018 - Automotive meets Electronics (Dortmund)
In: AmE 2018 - Automotive meets Electronics 2018
Widerspick C., Bauer W., Fey D.:
Latency Measurements for an Emulation Platform on Autonomous Driving Platform NVIDIA Drive PX2
In: ARCS Workshop 2018; 31th International Conference on Architecture of Computing Systems 2018

2017

Kohl J., Bauer W., Bäsig J., Fey D.:
Evaluating a Simulation based PLC Processor Optimization
15th Annual Industrial Simulation Conference (Warsaw, Poland)
In: ISC 2017 2017
Kohl J., Bauer W., Bäsig J., Rübesam S., Fey D.:
Processor Error Detection Capabilities of Random Programs
Testmethoden und Zuverlässigkeit von Schaltungen und Systemen (Lübeck, Germany)
In: Tagungsband TuZ 2017 2017

2016

Bauer W., Kohl J., Bäsig J., Rübesam S., Fey D.:
Generation of Executable Runtime Constrained Random Programs Functional Processor Verification
The European Simulation and Modelling Conferences (Gran Canaria, Spain, 26. Oktober 2016 - 28. Oktober 2016)
In: ESM 2016 2016