• Navigation überspringen
  • Zur Navigation
  • Zum Seitenende
Organisationsmenü öffnen Organisationsmenü schließen
Friedrich-Alexander-Universität Chair of Computer Science 3 CS3
  • FAUZur zentralen FAU Website
  1. Friedrich-Alexander-Universität
  2. Technische Fakultät
  3. Department Informatik
Suche öffnen
    1. Friedrich-Alexander-Universität
    2. Technische Fakultät
    3. Department Informatik
    Friedrich-Alexander-Universität Chair of Computer Science 3 CS3
    Menu Menu schließen
    • Research
    • Teaching
    • Staff
    • Jobs
    1. Startseite
    2. Research
    3. PowerSOC

    PowerSOC

    Bereichsnavigation: Research
    • AIMS
    • ECAS
    • Embedded Computing
    • ETI Projects
    • ETI: Energy-efficient Architectures
    • Former Projects
    • FORMUS³IC
    • HSA
    • IMBRA
    • IntelRadar
    • KI-Flex
    • KI-Lernlabor
    • LO³-ML
    • LODRIC
    • Memristive Computing
    • MIMEC
    • Neuromorphic Computing
    • Non-Volatile Processors (NVPs)
    • Performance Modelling
    • POV.OS
    • PowerSOC
    • ReLoFeMris
    • RISC-V
    • SDI
    • Smart PMU

    PowerSOC

    Entwicklung einer skalierbaren SoC Architektur zur Berechnung von Power Quality Parametern nach IEC-61000-4-30

     

    FuE Programm Informations- und Kommunikationstechnik Bayern
    https://www.iuk-bayern.de/

    Project Partner
    iba AG
    https://www.iba-ag.com/en/

    The quality of energy supply is a key element of any economy. Disturbances in power grids can affect the quality of production units, for example during welding processes. In worst case, electrical engines can get damaged. Therefore, energy producers and consumers require power quality monitoring devices tracking various parameters to proof that they do not effect disturbances on the grid.

    Our goal is to evaluate the hardware requirements for sophisticated algorithms with high amount of measurement points. Dealing with sample rates of up to 400 kHz on 8 Channels brings regular embedded CPU architectures to limit of their performance. Therefore specialized streaming architectures with appropriate hardware modules are research. A highly generic and parameterizable SystemC simulation model is used for structural, timing and accuracy analysis. The knowledge gained leads to an FPGA prototype.

     

    Friedrich-Alexander-Universität
    Lehrstuhl für Informatik 3

    Martensstrasse 3
    91058 Erlangen
    • Impressum
    • Datenschutz
    • Barrierefreiheit
    • RSS Feed
    Nach oben