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    1. Friedrich-Alexander-Universität
    2. Technische Fakultät
    3. Department Informatik
    Friedrich-Alexander-Universität Chair of Computer Science 3 CS3
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    3. POV.OS

    POV.OS

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    POV.OS

    Philipp Gündisch

    Philipp Gündisch, M. Sc.

    Department Informatik (INF)
    Lehrstuhl für Informatik 3 (Rechnerarchitektur)

    Raum: Raum 07.153
    Martensstr. 3
    91058 Erlangen
    • E-Mail: philipp.guendisch@fau.de
    Kenan Gündogan

    Kenan Gündogan, M. Sc.

    Department Informatik (INF)
    Lehrstuhl für Informatik 3 (Rechnerarchitektur)

    Raum: Raum 07.153
    Martensstr. 3
    91058 Erlangen
    • E-Mail: kenan.guendogan@fau.de

    Professional Operating Vehicle Operating System (POV.OS)

     

    Autonomous systems have already entered the field of professional operating vehicles. POV.OS is mainly focused on land farming vehicles (e.g. tractors), construction machines (e.g. cranes), and mining machines (e.g. excavators). The typical environments are highly demanding for operating machines to work autonomously and also minimizing the risk of work accidents. All POVs have in common that they need to percept the surrounding environment with sensors and steer motors to work autonomously.

    In the POV.OS project a conglomerate of academic institutes and industry partners establishes an open-source platform-based operating system for this class of machines and vehicles. The platform will allow small and middle sized enterprises to innovate and enrich this field with modular and reusable solutions while enabling large enterprises to scale innovative solutions across the market. Prior to this, only end-to-end solutions entered the market with highly specialized software customized for each individual vehicle.

    The chair for computer architecture develops solutions to enable compute or data intensive algorithms on the platform. These algorithms are currently limited by the processor’s performance or power consumption. The acceleration of the algorithms will be directly implemented in FPGAs, e.g. based on an own RISC-V processor implementation as soft IP with appropriate accelerators for signal processing and AI operations.

     

    Friedrich-Alexander-Universität
    Lehrstuhl für Informatik 3

    Martensstrasse 3
    91058 Erlangen
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